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seven_persons
自己写的7人表决器的verilog程序，实现4人以上通过则通过的功能。(Seven people to write their own voting machine verilog program to achieve four or more people pass through function.)
- 2013-08-10 07:15:06下载
- 积分：1
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RISC
说明： RISC全部源码，包含仿真文件，使用makefile脚本编写，能通过vcs编译(RISC all source code, including simulation files, using makefile script, can be compiled through VCS)
- 2020-04-14 22:10:52下载
- 积分：1
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electric-8.08
The ElectricTM VLSI Design System is an open-source Electronic Design Automation (EDA) system that can handle many forms of circuit design, including:
* Custom IC layout
* Schematic Capture (digital and analog)
* Textual Languages such as VHDL and Verilog
(The ElectricTM VLSI Design System is an open-source Electronic Design Automation (EDA) system that can handle many forms of circuit design, including:* Custom IC layout* Schematic Capture (digital and analog)* Textual Languages such as VHDL and Verilog)
- 2009-01-09 20:01:17下载
- 积分：1
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cputimer
基于 CPU 的精确计时器，时钟频率越高，计时越准(Based on the exact CPU timer, the higher clock frequency, the more time-quasi-)
- 2009-04-25 10:36:11下载
- 积分：1
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VHDL由IEEE 1076标准定义的，IEEE标准的VHDL语言参考人…
VHDL is defined by IEEE Standard 1076, IEEE Standard VHDL Language Reference Manual (the VHDL LRM). The original standard was approved in 1987. IEEE procedures require that standards be periodically reviewed and either reaffirmed or revised. The VHDL standard was revised in 1993, 2000, and 2002. In each revision, new language features were added and some existing features enhanced. The aim in each revision was to improve the language as a tool for design and verification of digital systems.
Since the 2002 revision, there have two parallel efforts to further develop the language. The first was the VHDL Procedural Interface (VHPI) Task Force, a subcommittee of the IEEE P1076 Working Group. The VHPI Task Force prepared an interim amendment to the standard, formally approved by IEEE in March 2007. The amendment is titled IEEE 1076c, Standard VHDL Language Reference Manual―Amendment 1: Procedural Language Application Interface.
- 2023-05-31 06:40:03下载
- 积分：1
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Verilog_HDL
华为文档《硬件描述语言Verilog基础》-目录
原来搞VHDL，刚刚开始学Verilog。觉得这个入门的提纲不错，共享一下。
(Huawei Documents " basic Verilog Hardware Description Language" - the original directory engage in VHDL, just beginning to learn Verilog. Feel that the entry of the outline of a good, share some.)
- 2009-02-21 18:02:37下载
- 积分：1
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lab_instructions3
The objective of the labs today is to give you a basic understanding of FPGA design and
enough experience to begin your own FPGA design with the ISE 10.1 tools and the
Xilinx Spartan-3A DSP 1800A Starter Kit.
- 2010-12-31 17:16:42下载
- 积分：1
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VHDL实例应用的经典，大家学习必看的书籍。
VHDL实例应用的经典，大家学习必看的书籍。-VHDL classic example of the application, see U.S. study books.
- 2023-04-30 04:00:04下载
- 积分：1
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对于Spartan 3E漆
Paint for SPARTAN 3E
- 2022-07-03 12:31:12下载
- 积分：1
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VHDL语言基本数学运算库
VHDL语言基本数学运算库-VHDL basic arithmetic library
- 2022-03-03 06:03:30下载
- 积分：1
