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application-in-card-and-servo-drive
AB相编码器解码接口_PWM输出SOPC方案及其在运动控制卡和伺服驱动器中的应用(AB phase encoder decoder interface _PWM output SOPC program and its application in motion control card and servo drive)
- 2012-03-22 12:44:52下载
- 积分:1
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EDA设计数字频率计
这是用verilog语言编写的可变量程数字频率计程序,可选择不同量程,下载到FPGA后现象正确。This is the Verilog language with a variable range digital frequency program, can choose a different range, download to the FPGA after the correct phenomenon。
- 2022-10-14 18:00:03下载
- 积分:1
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CORDIC_vhdl
基于VHDL语言的CORDIC算法实现,用于计算sin(x),cos(x)等,实测可用(Based on VHDL CORDIC algorithm, used to calculate sin (x), cos (x), etc., the measured available)
- 2020-11-27 22:19:31下载
- 积分:1
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ddr3_mig8
fpga实现ddr数据收发测试,完整的工程,下载解压后,即可正确运行,已多次验证无误(FPGA DDR data receive and receive test, complete engineering, download and unzip, can run correctly, has been verified many times)
- 2018-01-18 21:05:12下载
- 积分:1
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CJQ-V1.0-fpga
实现FPGA对AD芯片AD7060的控制,程序代码的注释很多,易学易懂,适合初学者学习使用(it is good ...)
- 2013-10-10 11:20:31下载
- 积分:1
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Study_Test
实现简单的硬件加法器、除法器,实现源码文中注释(Realize simple hardware adder and divider, realize source code)
- 2020-06-21 05:20:01下载
- 积分:1
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ProtelDesignInVHDL
说明: Protel中VHDL设计参考,pdf,不错的一本学习VHDL的书(Protel design in VHDL)
- 2009-08-21 11:16:24下载
- 积分:1
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CAN总线开发代码 can-sja1000
CAN总线开发代码,FPGA与sja1000通信,可实现CAN的接收和发送。(The FPGA and the sja1000 CAN bus development code, communication, which CAN realize the CAN send and receive.)
- 2021-04-14 17:08:55下载
- 积分:1
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USART
基于USART的ARM与FPGA通信实验(Based on the ARM and FPGA communication experiment of USART
)
- 2017-04-15 16:58:30下载
- 积分:1
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浮动点加法器 32 位
浮点加法器 32 位使用 verilogused 添加 2 浮点数......
- 2022-05-18 00:14:40下载
- 积分:1