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VHDLquartusmodelsim
内容有VHDL语法总结及相应的实例应用，每个程序我都亲自试过，特别适合初学VHDL的同学们。常用的程序有 设计一个M序列发生器，M序列为“11110101”、 设计一个彩灯控制器，彩灯共有16个，每次顺序点亮相邻的四个彩灯，如此循环执行，循环的方向可以控制。设计一个跑马灯控制器。一共有8个彩灯，编号为LED0~LED7，点亮方式为：先从左往右顺序点亮，然后从右往左，如此循环往复等等。这些都是我在考试前熬夜总结的，很有用。如果配合开发板用的话，那就更好了
( VHDL syntax summary content and the appropriate application instance, every program I have personally tried, especially for students of beginner VHDL. Common program has designed a sequence generator M, the M series is 11110101 , a lantern controller design, a total of 16 lights, each sequence of four adjacent lights lit, so the cycle execution cycle direction can be controlled. Marquee design a controller. A total of eight lights, numbered LED0 ~ LED7, the lighting way: first left to right order of light, and then right to left, so the cycle and so on. These are all I stay up all night before the exam summary, very useful. When combined with the development board, then so much the better
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- 2016-05-15 14:51:51下载
- 积分：1
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lcd1602_drive
用Verilog实现1602的配置及功能。正确编译与实现(Realized by Verilog 1602 configurations and functions. Compilation and implementation of the right)
- 2011-01-21 16:47:27下载
- 积分：1
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按键在数字电路设计中经常用到。按键的弹跳现象是数字系统设计中存在的客观问题。按键是机械触点，当接触点断开或闭合时会产生抖动。为使每一次按键只做一次响应，就必须去...
按键在数字电路设计中经常用到。按键的弹跳现象是数字系统设计中存在的客观问题。按键是机械触点，当接触点断开或闭合时会产生抖动。为使每一次按键只做一次响应，就必须去除抖动。本文对按键的抖动信号进行了分析，并通过计数器的方式完成了消除抖动电路模块的设计-?
- 2022-08-07 18:25:32下载
- 积分：1
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leadingzero
使用并行结构对32位数据进行前导零检测，使用Verilog编程(Use parallel structure to the 32-bit data, leading zero detection, using Verilog Programming)
- 2010-05-12 10:48:36下载
- 积分：1
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8832135
一个具有“百分秒，秒，分”计时功能的数字跑表，可以实现一个小时以内的精确至百分之一秒的计时。
数字跑表的显示读者可以通过编写数码管显示程序来实现，本训练只给出数字跑表的实现过程。
读者还可以通过增加小时的计时功能，实现完整的跑表功能。(A " percentage of seconds, seconds, minutes," digital stopwatch timer can be achieved within an hour of precision to the hundredth of a second time. Digital stopwatch readers can display the digital display through the preparation of procedures to achieve, given the training is only the realization of the process of digital stopwatch. Readers can also function to increase hours of time to achieve full stopwatch function.)
- 2009-04-09 13:20:35下载
- 积分：1
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VHDLdevelopment-court
vhdl数字电路设计经典教程，入门必备，非扫描版，非常清晰(vhdl digital circuit design classic handbook, entry-essential, non-scan version, very clear)
- 2011-07-13 16:23:18下载
- 积分：1
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74LS
数字逻辑与系统的关于所有的器件74LS的介绍，功能表(Digital Logic and System devices 74LS on the introduction of all the menu)
- 2010-12-30 17:27:19下载
- 积分：1
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protel fpga library a popular package is very difficult to find the
protel fpga常用封装库1，非常难找的-protel fpga library a popular package is very difficult to find the
- 2023-04-26 17:30:02下载
- 积分：1
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以前学习VHDL语言时做的一个电子闹钟程序，可以实现时，分，秒的计时以及定时，校时，闹钟，整点报时的功能。...
以前学习VHDL语言时做的一个电子闹钟程序，可以实现时，分，秒的计时以及定时，校时，闹钟，整点报时的功能。-VHDL language before learning to do procedures in an electronic alarm clock, you can realize hours, minutes and seconds of time and from time to time, school time, alarm clock, the whole point timekeeping function.
- 2022-05-06 21:47:35下载
- 积分：1
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海力士公司8M字节的SDR SDRAM实现Verilog仿真语言。
Hynix公司8M byte sdr sdram的verilog语言仿真实现。-Hynix company 8M byte sdr sdram realize the Verilog simulation language.
- 2023-07-14 06:05:04下载
- 积分：1
