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e2prom_rd
Verilog HDL 读取EEPROM项目的详细构建(Verilog HDL EEPROM read the detailed construction)
- 2013-05-25 11:53:20下载
- 积分：1
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一种新的FIFO实现方法,verilog描述，通过modelsim 6.0 仿真，Quartue综合...
一种新的FIFO实现方法,verilog描述，通过modelsim 6.0 仿真，Quartue综合-FIFO realize a new method, verilog description, modelsim 6.0 through simulation, Quartue integrated
- 2023-01-18 15:40:03下载
- 积分：1
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calculator_final
清华大学电子课程设计：Verilog，QuartusII可正确运行，可下载到FPGA上，音乐计算器，完成两个三位数的运算，有注释，很强大！！(Verilog, QuartusII run correctly, can be downloaded to the FPGA, music, calculator, completed two three-digit operations, there are notes, very powerful! !)
- 2020-08-16 23:38:25下载
- 积分：1
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this come from alter ,you can look and find it on line.
this come from alter ,you can look and find it on line.
- 2022-12-12 10:20:03下载
- 积分：1
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FPGA实现CAN总线控制器源码
说明： 参照can芯片 saj1000控制器结构，写的can控制器(According to the structure of can chip saj1000 controller, the CAN controller is written)
- 2021-01-19 21:38:41下载
- 积分：1
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EDA常用计数函数VHDL程序设计，减法计数器：可预置数：
EDA常用计数函数VHDL程序设计，减法计数器：可预置数：-common counting function EDA VHDL programming, subtraction counter : Preset :
- 2022-03-25 01:33:15下载
- 积分：1
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FPGA读写SDRAM的VHDL程序(已经测试过)
FPGA读写SDRAM的VHDL程序(已经测试过)-SDRAM read and write the VHDL program FPGA (already tested)
- 2022-05-20 21:52:20下载
- 积分：1
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FSM_Robustness_Testing
基于有限状态机的健壮性测试研究。
关键词：健壮性测试；增强有限状态机；全球平台；安全通道协议(The Research of Robustness Testing Based on FSM)
- 2012-09-06 14:08:56下载
- 积分：1
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Discrete cosine transform and inverse discrete cosine transform of the HDL code...
离散余弦变换及反离散余弦变换的HDL代码及测试文件。包括VHDL及Verilog版本。可用途JPEG及MEPG压缩算法。-Discrete cosine transform and inverse discrete cosine transform of the HDL code and test files. Including VHDL and Verilog versions. And MEPG can use JPEG compression algorithm.
- 2023-04-06 08:40:04下载
- 积分：1
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m_ca7
verilog编写的基于CA算法的m序列发生器，其中验证了多种CA系数来实现m序列。(CA-based algorithm written in verilog m-sequence generator, which verify the CA factor to achieve a variety of m-sequence.)
- 2011-10-26 14:33:59下载
- 积分：1
