登录
首页 » VHDL » SPI的verilog代码的可编程时钟

SPI的verilog代码的可编程时钟

于 2022-10-30 发布 文件大小:5.20 MB
0 104
下载积分: 2 下载次数: 1

代码说明:

SPI Verilog code with programmable clock

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • xapp1251
    说明:  1. REVISION HISTORY 2. OVERVIEW 3. SOFTWARE TOOLS AND SYSTEM REQUIREMENTS 4. DESIGN FILE HIERARCHY 5. INSTALLATION AND OPERATING INSTRUCTIONS 6. SUPPORT
    2020-11-07 09:49:49下载
    积分:1
  • PID_Verilog
    说明:  之前一直找不到自学编写了一个,PID案例,分享下(I have been unable to find a self-taught, compiled a PID case, share under)
    2020-10-08 13:26:54下载
    积分:1
  • Ffpga-jpegP
    基于FPGA的JPEG图像压压缩,实现JPEG图像的实时压缩 (Real-time compression pressure compressed FPGA-based JPEG images, JPEG images)
    2012-08-23 22:11:39下载
    积分:1
  • VHDLAVRIPcore
    说明:  使用VHDL语言写的AVR单片机IP核, 可以直接使用,已经经过验证, 十分珍贵哦(Written in VHDL language using the AVR microcontroller IP core, can be used directly, has proven very valuable oh)
    2009-08-28 14:00:29下载
    积分:1
  • 赛灵思XC2C256频率计的Verilog实现。mt10t7 7
    Frequency meter Verilog implementation for Xilinx XC2C256. MT10T7 7-seg LCD used for output.
    2022-03-26 03:57:37下载
    积分:1
  • Lantern controller vhdl language test eda
    彩灯控制器 vhdl语言开发 eda实验-Lantern controller vhdl language test eda
    2023-01-14 11:25:03下载
    积分:1
  • 按键消抖
    说明:  按键消抖,避免按键抖动造成信号误触发,增大按键输入的可靠性(Key jitter elimination, avoid key jitter caused by signal error trigger, increase the reliability of key input)
    2020-07-04 11:00:01下载
    积分:1
  • 0720_03_AD_uart
    基于fpga的verilog实现ad及uart,并进行仿真验证(Verilog based on FPGA implements AD and uart, and carries out simulation verification)
    2019-01-21 20:52:46下载
    积分:1
  • sample_tcam.tar
    verilog RTL code for simple TCAM
    2014-06-25 15:50:08下载
    积分:1
  • mdct_latest.tar
    mdct, it contains DOC,MATLAB,source,synthesis.
    2009-12-11 14:15:39下载
    积分:1
  • 696518资源总数
  • 105554会员总数
  • 2今日下载