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emmc_cmd_interface_module
emmc控制芯片CMD命令线主机接口模块,(emmc control chip CMD command line host interface module)
- 2021-02-09 11:19:53下载
- 积分：1
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8051的vhdl源代码，主要针对初学者
8051的vhdl源代码，主要针对初学者-8051 VHDL source code, mainly for beginners
- 2022-02-05 02:00:30下载
- 积分：1
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Altera Corporation for DE2 development board of the TV demonstration
用于Altera公司DE2开发板的TV demonstration-Altera Corporation for DE2 development board of the TV demonstration
- 2022-03-26 12:20:58下载
- 积分：1
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ReliabilityByFORM
first order reliability method
- 2014-07-21 16:59:32下载
- 积分：1
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06219426Spartan3E
VHDL汇编语言原理及源代码。spartan 3e开发板试用。(VHDL language.)
- 2011-02-10 09:41:12下载
- 积分：1
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ads8361_avl
Interface for ADS8361 TI ADC
IP Core for ALTERA NIOS2
- 2013-04-04 16:12:13下载
- 积分：1
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NTR2120
超低速的光纤一体发接收发送器,同于以前的光纤一体化接头都只适用于2M以上的通讯,如需将232等低速信号用光纤传输出,需要加复杂的调制解调电路,网动光电新生产的这款光纤头主要针对低速信号,可以传送DC-500KPS的信号,极大地简化了硬件设计.(Ultra-low-fat whole-speed fiber-optic transmitter receiver with fiber-optic integration in the previous joint only applies to more than 2M communications, etc. For the 232 low-speed optical fiber transmission of signals, the need to increase the complexity of the modulation and demodulation circuit, the net move Photoelectric new production of this first major response to low-speed fiber-optic signal, DC-500KPS can send the signal, greatly simplifying the hardware design.)
- 2008-06-27 11:48:58下载
- 积分：1
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rs_encoder
RS编码器的fpga实现，有TESTBench(RS encoder to achieve the fpga, and TESTBench)
- 2009-06-24 11:37:04下载
- 积分：1
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6713emiftofpgatopci,这个是完整的一套从6713的emif到fpga的双口ram，然后主机通过9054到双口ram，交换数据完成
6713emiftofpgatopci,这个是完整的一套从6713的emif到fpga的双口ram，然后主机通过9054到双口ram，交换数据完成-6713emiftofpgatopci, this is a complete set of the EMIF from 6713 to the FPGA
- 2022-01-25 23:08:47下载
- 积分：1
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PipelineSim
一个计算机原理课程设计的作业，5级流水线CPU，指令集到代码均为自己设计，有最终报告文档，组建说明，并行除法，16位字长，定长指令，Verilog源代码，顶层设计图。结构简单，冲突解决方式也很简单，代码量小。(A computer theory course design work, five pipelined CPU, instruction set to the code are design, the final report documents the formation of parallel division, 16-bit word length, fixed-length instructions, Verilog source code, top level design. Simple structure, conflict resolution is also very simple, a small amount of code.)
- 2012-06-24 22:19:14下载
- 积分：1
