登录
首页 » VHDL » VHDL的循环冗余校验发生器和接收器

VHDL的循环冗余校验发生器和接收器

于 2022-01-23 发布 文件大小:4.06 kB
0 205
下载积分: 2 下载次数: 1

代码说明:

VHDL cyclic redundancy check generator und receiver

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • SMBus
    SMbus通讯协议的Verilog程序段,已通过Moldesim的仿真,可用(Verilog program segment of the SMbus communication protocol, has been through the Moldesim simulation, the available)
    2021-03-24 18:29:15下载
    积分:1
  • ethernet_loopback
    通过FPGA驱动千兆以太网口,完成SPARTAN6上的UDP数据包闭环测试,即通过网口发送数据包到FPGA,FPGA内部将接收到的数据返回到PC机,建议测试之前添加ARP静态绑定,FGPA内部的IP以及MAC地址在ROM里的COE文档里可以看到,发送端添加了CRC以及整体CHECKSUM的计算(Driven by FPGA Gigabit Ethernet port, UDP SPARTAN6 data packet on the closed loop test, through the network to send data packets to FPGA, FPGA will receive the data back to the PC, the proposed test before adding ARP static binding, FGPA internal IP and MAC address in the COE document in the ROM where you can see, the sender adds CRC and CHECKSUM integral calculation)
    2017-11-20 10:21:38下载
    积分:1
  • Shumaguan
    在BASYS3上实现跑马灯的功能。第一LED交替闪烁;第二LED由左至右逐个变亮,再逐个变暗;第三LED由右至左逐个变亮,再逐个变暗;第四LED由两边逐个变亮,再从中间逐个变暗。(Realize the function of the horse light on BASYS3. The first LED flashes alternately; second LED brightens from left to right and then darkens one by one; the third LED turns from right to left, then darkens one by one, and then darkens one by one; fourth LED is brightened by both sides, and then darkening from the middle.)
    2018-06-21 11:06:16下载
    积分:1
  • AD
    说明:  基于fpga的ad采样程序 可控制ad9226对信号进行采样(Ad9226 signal sampling can be controlled by ad9226 sampling program based on FPGA)
    2020-12-19 17:09:10下载
    积分:1
  • fpga串口的接收程序
    fpga串口的接收程序基于verilog语言拿走不用谢。(The receiving program of FPGA serial port is based on Verilog language.)
    2020-06-18 03:20:02下载
    积分:1
  • FULL-FPGA-SCH
    包括Cyclone II EP2C20 原理图.CycloneII开发板原理图fpga.EP1C3T144 FPGA develop board manual.EP1C6Q240C6开发板原理图.EP2C8开发板原理图.EPM1270F256C5 MAX_II_board_schematics.SF-EP1V2+FPGA开发板原理图.XC3S400红色飓风开发板原理图.红色飓风II代开发板原理图2.(Including the Cyclone II EP2C20 schematic . CycloneII development board schematics fpga.EP1C3T144FPGA develop board manual.EP1C6Q240C6 development board schematic . EP2C8development board schematics . EPM1270F256C5MAX_II_board_schematics.SF-EP1V2+FPGA development board schematic . XC3S400red hurricane development board schematics. Red hurricane II development board schematic diagram2)
    2012-04-28 15:47:07下载
    积分:1
  • 用verilog写的4*4小键盘按键检测程序。本工程已经编译好。可以直接在Atera DE1 Fpga开发板上运行...
    用verilog写的4*4小键盘按键检测程序。本工程已经编译好。可以直接在Atera DE1 Fpga开发板上运行-Written using Verilog 4* 4 keypad keys detection procedures. The project has been compiled. Directly in the development of Atera DE1 Fpga board run
    2022-08-21 19:42:09下载
    积分:1
  • 3Code_for_Medx
    3x3中值滤波器的FPGA实现现(VERILOG)可直接使用。 (3x3 median filter FPGA implementation of the present (VERILOG) can be used directly.)
    2012-07-30 00:49:45下载
    积分:1
  • LZRW1 VHDL语言,有有下
    lzrw1算法,VHDL语言,不带TB。模块验证,自己写TB文件
    2023-05-21 19:15:03下载
    积分:1
  • Example-3-1
    说明:  经过验证的经典实例,完全正确的。适合于入门新手的实例,仅供交流使用。(fpga exampe)
    2009-08-17 22:07:13下载
    积分:1
  • 696518资源总数
  • 105895会员总数
  • 18今日下载