-
基于FPGA,实现了移位除法的功能,程序接口简单,十分好用,已经验证。...
基于FPGA,实现了移位除法的功能,程序接口简单,十分好用,已经验证。-Based on the FPGA, to achieve the division of functional shift, the program interface is simple, very easy to use, has already been verified.
- 2022-10-14 07:10:02下载
- 积分:1
-
01_基于ZYNQ的FPGA基础入门
VIVADO SOC 使用文档 基于zynq 7020(vivado soc example text of zynq)
- 2020-06-17 12:00:01下载
- 积分:1
-
一个PS2 IP CORE(VHDL) for FPGA
一个PS2 IP CORE(VHDL) for FPGA-A PS2 IP CORE (VHDL) for FPGA
- 2022-09-04 02:20:03下载
- 积分:1
-
writereadflash
这个是用VHDL实现FPGA对FLASH的读写。(This is achieved using VHDL FLASH FPGA to read and write.)
- 2013-07-14 22:06:38下载
- 积分:1
-
BCH3
BCH3.c,提供m<21以下的所有码长的BCH编解码模块。以供大家参考。谢谢(BCH encoder&decoder GF(2^m) m<21)
- 2021-01-26 11:58:36下载
- 积分:1
-
chaotic_1d
说明: 一维超混沌随机数的生成verilg,还有testbench仿真激励,modelsim的仿真工程。(The generation of one-dimensional hyperchaotic random number verilg, testbench simulation stimulation and Modelsim simulation engineering.)
- 2020-05-11 12:45:42下载
- 积分:1
-
xilinx公司的FPGA实现数字视频信号处理器。语言是VHDL。
xilinx公司的FPGA实现数字视频信号处理器。语言是VHDL。-Xilinx FPGA to achieve the company
- 2022-10-21 12:30:03下载
- 积分:1
-
vhdl_fir
在matlab仿真的基础上,用maxplus2实现等波纹法的程序代码(In matlab simulation, based on the use of such corrugated maxplus2 realize law code)
- 2008-05-21 20:30:35下载
- 积分:1
-
sha1
利用verilog语言实现了SHA-1机密算法,具体算法与加密芯片ds28e01一致。(Using Verilog to achieve the SHA-1 secret algorithm, the specific algorithm is consistent with the encryption chip ds28e01.)
- 2020-11-08 08:49:47下载
- 积分:1
-
该源码为几个正弦ROM,已经编译并通过,可以直接下载,不需要,内部含有正弦ROM表,还有ROM的宏模块...
该源码为几个正弦ROM,已经编译并通过,可以直接下载,不需要,内部含有正弦ROM表,还有ROM的宏模块-the source for several sine ROM, has been compiled and passed, can be directly downloaded, not internal ROM containing sine table, the Acer ROM module
- 2022-02-15 13:48:53下载
- 积分:1