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基于fpga和xinlinx ise的usb端口vhdl程序,希望对你有所帮助!
基于fpga和xinlinx ise的usb端口vhdl程序,希望对你有所帮助!-VHDL program for USB port based fpga and xinlinx ise, wish help for you!
- 2022-02-05 00:39:46下载
- 积分:1
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用VHDL实现的DDS逻辑,大家可以参考下
用VHDL实现的DDS逻辑,大家可以参考下-DDS achieved using VHDL logic, we can refer to the following
- 2022-08-10 09:43:58下载
- 积分:1
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PCI-based--DSG
基于PCI的数字信号发生器
关键词:PCI总线,PCI9054,FPGA,卡尔曼滤波器(PCI-based digital signal generator
Keywords: PCI bus, PCI9054, FPGA, Kalman filter)
- 2016-06-12 20:41:45下载
- 积分:1
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RX_RS_DEC
OFDM系统新型RS编解码的verilogHDL设计,经测试误码率性能提高(OFDM system verilogHDL new RS codec design, improved bit error rate performance tested)
- 2020-12-31 10:59:00下载
- 积分:1
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Wishbone dma ip core
Wishbone dma ip core
- 2022-01-26 04:18:15下载
- 积分:1
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chuzuche
出租车vhdl程序,并带有testbench仿真程序,通过开始按键复位,然后根据行使信号进行公里计数,起步价3公里8元钱,超过3公里一公里1元钱(Taxi vhdl program, with a testbench simulation program, started by the reset button, then the exercise kilometer count signal, starting at 3 km 8 yuan, more than three kilometers one kilometer dollar.)
- 2016-07-14 14:41:24下载
- 积分:1
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include UART port of VERILOG source, the program tested in FPGA, as chip design,...
包含UART口的VERILOG源程序,该程序在FPGA上验证通过,可作为芯片设计,或FPGA设计的一个完整IP核,硬件设计的兄弟们可参考一下。-include UART port of VERILOG source, the program tested in FPGA, as chip design, or FPGA design of a complete IP cores, hardware design brothers can make reference.
- 2022-06-01 13:44:15下载
- 积分:1
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出租车计价器VHDL程序与仿真 的vhdl源代码
出租车计价器VHDL程序与仿真 的vhdl源代码-Taximeter VHDL procedures and simulation vhdl source code
- 2022-03-29 12:46:57下载
- 积分:1
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3Digit_7segment_ind_decoder
3 Digit BCD to 7 segment indicator decoder
- 2015-03-05 16:49:04下载
- 积分:1
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双向使用VHDL仿真环境转移登记环节
用vhdl实现双向移位寄存器 仿真环境MAXPLUS-II,QUARTUS--bidirectional use VHDL simulation environment shift register Segments-II, QUARTUS-
- 2022-03-20 23:34:56下载
- 积分:1