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用VHDL语言编写一计时范围为59.99秒的跑表
计时范围为59.99秒；有计时开始和停止计时控制，复位控制可以对所有计时进行异步复位；计时结果由四位七段数码管显示。
- 2022-02-13 02:19:25下载
- 积分：1
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frequency divider
说明： FPGA对系统50M时钟进行分频。FPGA最基本功能基础(FPGA Verilog program, key detection, program jitter elimination, jitter elimination, delay detection keys)
- 2019-04-27 23:35:12下载
- 积分：1
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QPSK_System
实现QPSK系统的调制解调仿真，基带成形滤波器采用升余弦滚降滤波器，将仿真的误码率与理论误码率作了比较(Implement QPSK modulation and demodulation simulation system, the baseband shaping filter using Raised Cosine filter will BER simulation were compared with the theoretical BER)
- 2020-12-22 15:39:07下载
- 积分：1
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vhdl N
vhdl N-0.5分频方法设计，可以输入任意数值N，即分得到N－0.5的频率。-vhdl N- 0.5-frequency method, we can input arbitrary numerical N, namely, to be N- 0.5 frequencies.
- 2022-01-31 02:10:11下载
- 积分：1
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adding
加法器，输入两个整数，用电路图形式将其逻辑原理呈现出来，该加法器为8位运算，每一位都对应一张电路图，可展示其完整过程(Adder, input two integer, with circuit diagram form its logical principle appear, this adder is 8 bit arithmetic, each corresponding to a circuit diagram, can show the complete process)
- 2012-11-19 13:54:32下载
- 积分：1
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-Elliptic
We present elliptic curve cryptography (ECC) coprocessor,
which is dual-field processor with projective
coordinator. We have implemented architecture for scalar
multiplication, which is key operation in elliptic curve
cryptography. Our coprocessor can be adapted both prime field
and binary field, also contains a control unit with 256 bit serial
and parallel operations , which provide integrated highthroughput
with low power consumptions. Our scalar multiplier
architecture operation is perform base on clock rate and produce
better performance in term of time and area compared to similar
works. We used Verilog for programming and synthesized using
Xilinx Vertex II Pro devices. Simulation was done with Modelsim
XE 6.1e, VLSI simulation software from Mentor Graphics
Corporation especially for Xilinx devices.
- 2012-02-09 10:48:50下载
- 积分：1
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vhdl实现的鼠标协议，代码可读性高，适合作为参考案例。
vhdl实现的鼠标协议，代码可读性高，适合作为参考案例。-VHDL realize mouse agreement, the code readable, suitable as a reference case.
- 2022-02-06 08:18:06下载
- 积分：1
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pro1
对用开发板上开关产生的信息做汉明编码并通过串口发送至电脑(The Hamming code is generated from the switch on the development board and sent to the computer through the serial port.)
- 2018-11-15 17:01:21下载
- 积分：1
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ads8361_avl
Interface for ADS8361 TI ADC
IP Core for ALTERA NIOS2
- 2013-04-04 16:12:13下载
- 积分：1
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Constant_PQ_Microgid_matlab
逆变器并网发电的主要是逆变器输出正弦波电流的控制技术，要求与电网同频同相的电流，此matlab模型中使用锁相环技术，恒功率控制，LCL滤波器技术使达到并网要求(Constant_PQ_Microgid )
- 2021-04-02 10:09:07下载
- 积分：1
