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Vhdl_Programming_Example
vhdl编程语言电子书，英文的，有很多例子(VHDL programming language e-books, in English, there are many examples of)
- 2009-01-16 20:59:00下载
- 积分：1
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mdio
用VIVADO软件编写的，实现以太网芯片88E1510中的mdio控制模块代码，并且含有VIO仿真文件(Written in VIVADO software, the realization of the Ethernet chip 88 e1510 mdio control module of code, and contains the VIO simulation file)
- 2020-09-16 14:37:55下载
- 积分：1
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Hilbert
说明： 基于altera fpga的fir IP核实现希尔伯特变换，有matlab仿真(Based on Altera FPGA fir IP core to achieve Hilbert transform, matlab simulation)
- 2020-10-05 11:27:38下载
- 积分：1
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存储器控制FPGA程序，包括ram，fifo，sdram，flash等。
存储器控制FPGA程序，包括ram，fifo，sdram，flash等。-FPGA memory control processes, including ram, fifo, sdram, flash and so on.
- 2022-09-25 03:50:02下载
- 积分：1
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ECHO_DE2
Very good info. for RS-232 echo VHDL code .
- 2008-05-31 00:41:53下载
- 积分：1
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LDPC-long40rate0.5-encode-and-decode
LDPC的短码，码长为40速率为0.5的LDPC码的设计，用的是QC矩阵，压缩文件为原码部分，工程太大传不上去。(LDPC short code, a code length of 40 rate of 0.5 LDPC code design, using a QC matrix, the compressed file is part of the original code, do not pass up the works too.)
- 2013-07-01 09:28:47下载
- 积分：1
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ref-sdr-sdram-verilog
sdram控制器的开发程序，还有文档，可以参考以下(SDRAM controller development process, there is a document, you can refer to the following)
- 2008-06-13 22:15:41下载
- 积分：1
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PipelineCPU
Quartus II 7.2环境中，采用硬件描述语言VHDL独立完成了基于MIPS指令集的32位RISC处理器的逻辑设计(quartusII mips pipeline 32bit cpu design)
- 2010-05-26 16:51:42下载
- 积分：1
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tanchishe-QuartusII
VGA显示FPGA实现的VHDL语言的贪吃蛇游戏设计
本设计分为6个模块主要是扫描模块 VGA现实和控制模块 游戏设计的模块 电源模块等
用QUARTUS2仿真运行(VGA display FPGA VHDL language to realize the Snake game design
The design is divided into six modules mainly scanning module VGA module power module and control module reality game design, etc.
Simulation run with QUARTUS2)
- 2020-11-06 10:09:50下载
- 积分：1
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bootstrap_ace_v1.3.2
多年项目经验测试文档测试文档，重要保存重要保存重要保存重要保存重要保存重要保存(Years of project experience testing document testing, it is important to save save save important important important important to save save save important)
- 2016-03-05 15:46:27下载
- 积分：1
