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xa880
Join repetitive control, Very convenient to use, Iterative self-organizing data analysis.
- 2017-07-30 23:02:42下载
- 积分:1
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adc_cfg
adc器件ads62p49配置代码,已在工程中验证可用(Temperature sensor DS18B20 parses the code, has verified the ADC device configuration code, has been verified available)
- 2020-11-04 16:29:51下载
- 积分:1
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D_flip
source vhdl code of D flipflop logic
- 2011-03-18 17:49:28下载
- 积分:1
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fpga里实现 uart 经典 vhdl语言写的 ise工程文件
fpga里实现 uart 经典 vhdl语言写的 ise工程文件-fpga implementation in vhdl language classic uart of ise project file
- 2022-07-10 00:07:59下载
- 积分:1
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AHB-answers
这个文档回答了很多关于AHB总线在使用上经常遇到的问题(this doc gives a lot of answers for using AHB bus when doing design)
- 2020-10-21 12:17:24下载
- 积分:1
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FPGA
verilog编写的QPSK发射机的FPGA部分,已经过验证,完全达到要求。调制矢量误差4%(QPSK transmitter verilog prepared by the FPGA portion, has been proven, fully meet the requirements. Modulation vector error of 4 )
- 2013-10-08 14:58:23下载
- 积分:1
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reader
实现verilog读写txt文件,从sut.txt从读取数据,进行操作后,写入out.txt(Realize verilog read and write txt file)
- 2020-11-15 21:29:41下载
- 积分:1
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自己编写的只读存储器ROM16*8的试试很好用的
自己编写的只读存储器ROM16*8的试试很好用的-ROM 16*8
- 2022-05-13 03:23:21下载
- 积分:1
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XadcMicroblaze-master
用zynq实现片内的数模转换,基于最新的zynq平台(zynq xadc on FPGA arm)
- 2020-06-21 12:00:02下载
- 积分:1
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ds1302_seg7
使用Verilog完成DS1302的驱动,工程已经经过测试,可直接使用。(DS1302 using Verilog complete drive, the project has been tested and can be used directly.)
- 2014-12-10 15:27:48下载
- 积分:1