登录
首页 » VHDL » altera EP1C6Q240C6开发板原理图

altera EP1C6Q240C6开发板原理图

于 2022-12-08 发布 文件大小:66.53 kB
0 159
下载积分: 2 下载次数: 1

代码说明:

altera EP1C6Q240C6开发板原理图-altera EP1C6Q240C6 SCH

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • Realize four kinds of common sine wave, triangle, sawtooth, square wave (A, B) t...
    实现4种常见波形正弦、三角、锯齿、方波(A、B)的频率、幅度可控输出(方波 A的占空比也是可控的),可以存储任意波形特征数据并能重现该波形,还可完成 各种波形的线形叠加输出。 -Realize four kinds of common sine wave, triangle, sawtooth, square wave (A, B) the frequency, magnitude controllable output (square wave A, is also a controllable duty cycle), can store arbitrary waveform feature data and can reproduce the waveform, but also completed a variety of linear superposition of the output waveform.
    2022-09-08 01:55:03下载
    积分:1
  • how-to-use-modelsim
    逐步演示试用modelsim建立仿真的过程,初学者应该看看(Step by step demonstration of the trial to establish modelsim simulation process, beginners should look at the)
    2009-04-17 09:13:35下载
    积分:1
  • 学习应用FPGA pid实现
    pid程序,新学者,使用FPGA学习,希望大家一起学习
    2023-08-21 11:25:08下载
    积分:1
  • RS232 communication protocol with the VHDL language, based on the Altium Designe...
    此RS232通信协议用VHDL语言实现,基于Altium Designer公司的Protel DXP开发平台。本人是基于Nanaboard开发板编写的程序,其他用户只需要对配置文件进行修改即可用于其他电路板。-RS232 communication protocol with the VHDL language, based on the Altium Designer
    2023-01-28 04:55:04下载
    积分:1
  • class16_pll
    说明:  FPGA实现PLL锁相环,输出不同频率的时钟控制信号。(FPGA realizes PLL and outputs clock control signals of different frequencies.)
    2021-03-19 17:19:19下载
    积分:1
  • DAC5578_I2C
    TI公司的DAC5578驱动程序,经测试过的,CSDN资源分享(DAC5578 Driver of TI Company Tested and CSDN Resource Sharing)
    2020-06-18 21:40:01下载
    积分:1
  • Designing Digital Down Conversion Systems with Altera CIC MegaCore and FIR Compe...
    Designing Digital Down Conversion Systems with Altera CIC MegaCore and FIR Compensation Filter v6.1
    2022-02-02 23:02:14下载
    积分:1
  • LCD_1602
    说明:  以ISE为开发环境,Verilog语言编写程序。功能:FPGA控制 LCD_1602动态显示秒表(In the development environment of ISE, Verilog language is used to write programs. Function: LCD_1602 dynamic display stopwatch controlled by FPGA)
    2020-06-20 00:00:02下载
    积分:1
  • Experimental _EDA experimental guidance notes EDA books EDA technology and VHDL...
    _EDA实验讲义EDA实验指导书EDA技术与VHDL第3章EDA技术实用教程EAD技术与实践.等等资料-Experimental _EDA experimental guidance notes EDA books EDA technology and VHDL in Chapter 3 of EDA technologies utility EAD Technology and Practice Guide. And so on Information
    2022-09-22 04:20:06下载
    积分:1
  • floatadd
    说明:  浮点数加法器的源代码,实现浮点数的加法功能,浮点数遵循的是IEEE745标准(floating_piont addition)
    2021-04-06 18:19:02下载
    积分:1
  • 696518资源总数
  • 105895会员总数
  • 18今日下载