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3.4
移位除乘法器带testbench好用的工程(Useful addition to the shift multiplier works with testbench)
- 2011-07-26 10:54:46下载
- 积分:1
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dpwm
数字pwm,用于数字电源控制, 双环控制电压补偿器传输函数同单环控制传输
函数结构相同,只是对应系数不同,因此补偿器结构相同,电流 ADC 采用流水线 ADC,采样数据经过 4 个时钟周期后得到
量化的数字量。电流 ADC 采用流水线 ADC,采样数据经过 4 个时钟周期后得到
量化的数字量。
- 2022-03-25 19:56:57下载
- 积分:1
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CPU_Project_board
CPU 5级流水线实现(加hazard处理与板级验证,板级验证带有按键消抖)(5-stage pipelined CPU (plus hazard dealing with board-level verification, board-level verification with key debounce))
- 2020-12-03 09:29:25下载
- 积分:1
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DW8051_ALL
包中包括,
DW8051完整的Verilog HDL代码
两本手册:
DesignWare Library DW8051 MacroCell, Datasheet
DesignWare DW8051 MacroCell Databook
三篇51论文:
基于IP 核的PSTN 短消息终端SoC 软硬件协同设计
Embedded TCP/ IP Chip Based on DW8051 Core
以8051为核的SOC中的万年历的设计 (DW8051 is designed by synopsys, and its instruction cycle is 4 clock, which lead to about 3 times faster than Intel 8051 with the same oscillator frequency. I writed ram, rom, some other perpherals such as DES, RNG, and its testbench, and it worked all right!)
- 2021-05-07 09:28:36下载
- 积分:1
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infrared_receive
红外接收处理,根据外部波形记录波形的高低电平时间,从而得到波形数据。(Infrared receiver processing, according to the external waveform waveform record high and low times, resulting waveform data.)
- 2013-09-27 11:09:02下载
- 积分:1
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FPGA verilog代码
说明: 数电实验FPGA verilog代码,包括秒表、全加器、半加器等。(FPGA Verilog code for digital experiment)
- 2020-04-29 11:16:05下载
- 积分:1
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HASH
hash加速器的verilog实现,也用于fpga或asic(hash verilog rtl )
- 2015-01-29 18:48:13下载
- 积分:1
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Verilog-communication-source-code
基于Verilog的串口通信源码 ,实现串口通信功能(Verilog source code based on serial communication)
- 2011-10-29 17:21:59下载
- 积分:1
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各种基础module打包下载全集
例如分频器,alu,ram的verilog实现(The implementation of divider, alu, ram etc. in verilog)
- 2020-10-12 23:37:32下载
- 积分:1
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WM8731_WM8731L
wm8731音频编解码芯片使用介绍,该手册里面对该芯片进行了详细的描述,对各个单元模块也进行了详细的阐述(the handbook of WM8721/WM8731L)
- 2010-05-20 10:47:30下载
- 积分:1