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TDMsystem
实现多路可变时分复用，包括复接器，解复接，比特同步，帧同步，分频器(Implement multi-channel variable time division multiplexing, including multiplexer, demultiplexing, bit synchronization, frame synchronization, frequency divider)
- 2018-09-16 23:29:09下载
- 积分：1
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signaltap_user_guide
signaltap 中文说明，内容详细。
ALTERA signaltap USER GUIDE IN CHINESE(ALTERA signaltap USER GUIDE IN CHINESE)
- 2011-12-03 23:50:21下载
- 积分：1
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VHDL
用VHDL语言实现一Mealy型时序电路，并做时序仿真和功能仿真检验正确与否。(Implement a Mealy-type sequential circuits using VHDL language, and do functional simulation and timing simulation test correct.)
- 2014-03-20 14:44:28下载
- 积分：1
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m_xulie
这是用verilogHDL写的m序列发生器，简单易用，代码非常易读(It is written verilogHDL m sequence generator, easy to use, the code is very easy to read)
- 2015-05-27 20:21:26下载
- 积分：1
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frame_syn
- 2010-04-28 10:34:32下载
- 积分：1
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一篇用VHDL实现快速傅立叶变换的论文
一篇用VHDL实现快速傅立叶变换的论文，包括原理分析和代码实现，印度圣雄甘地大学M.A.学院提供(VHDL with a Fast Fourier Transform papers, including the principle of analysis and implementation of the code, the Mahatma Gandhi Institute of the University of Marat)
- 2004-10-05 11:06:01下载
- 积分：1
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ODBC
ODBC编程实例，使用ODBC对基于开关量数据采集卡的通信接口设计与实现。(ODBC programming examples, using ODBC for data acquisition card based digital communications interface design and implementation.)
- 2013-07-14 13:16:35下载
- 积分：1
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四人抢答器，已通过编译，仿真，包括抢答识别、计分、计时、数字显示等功能。...
四人抢答器，已通过编译，仿真，包括抢答识别、计分、计时、数字显示等功能。-Four Responder, has passed the compilation, simulation, including the answer in his identification, scoring, timing and digital display.
- 2023-08-16 08:05:03下载
- 积分：1
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Am29LV160D
Am29LV160D数据基本知识手册，基本原理及工作方式。(Am29LV160D Data basic knowledge Manual, the basic principle and ways of working.)
- 2013-06-05 19:26:08下载
- 积分：1
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fft1024-verilogCODE
fft 1024点verilog代码,适用于基-4的FFT算法描述，使用quartus，modelsim，(fftpoint 1024 verilog code)
- 2020-12-19 01:59:10下载
- 积分：1
