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pll
PLL 锁相环verilog程序 可以直接使用(The PLL can be used directly good use)
- 2014-08-28 19:06:33下载
- 积分:1
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一个多路复用器的例子,用VHDL语言写的。
A Mux example written in VHDL.
- 2023-01-13 15:05:04下载
- 积分:1
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example
一个电子秒表,最大显示59.99,具有暂停和reset功能(An electronic stopwatch, the maximum display 59.99, with a pause and reset functions)
- 2013-12-17 12:28:14下载
- 积分:1
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wishbone
wishbone接口的设计,在交换机和MAC之间建立wishbone接口(the wishbone interface design, wishbone interface between the switch and MAC)
- 2012-12-05 12:22:24下载
- 积分:1
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DS1302
基于DS1302芯片的VERILOG 语言数字钟。可实现年月日时分秒显示。(DS1302 chip-based language VERILOG digital clock. Date can be achieved when every minute display.)
- 2014-06-26 15:53:06下载
- 积分:1
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FPGA加密的方法,对于那些需要加密自己的vhdl源代码的人来说,很有用...
FPGA加密的方法,对于那些需要加密自己的vhdl源代码的人来说,很有用-FPGA encryption methods for those who need to encrypt their VHDL source code in a way, very useful
- 2022-11-20 11:40:03下载
- 积分:1
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- 2022-07-05 02:24:05下载
- 积分:1
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AMBA-Bus_Verilog_Model
说明: 该源码包是2.0版本的AMBA总线的Verilog语言模型,主要包括5个部分:AHB总线仲裁器,AHB-APB总线桥接器,AHB总线上从设备ROM模型,AHB总线上从设备RAM模型,参数定义。(This source code package is the model of V2.0 AMBA bus of ARM company, It mainly includes the following five parts: the AHB arbiter,AHB-APB bridge, AHB_Rom_Slave, AHB_Ram_Slave,Defines.)
- 2021-04-25 21:48:46下载
- 积分:1
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code
涉及到常用的模块,参数可配置,可以很方便的集成到应用中(Related to commonly used modules, parameters can be configured, can be easily integrated into applications)
- 2008-06-13 22:30:14下载
- 积分:1
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bignum
a big number class and a calculator using the class
- 2012-12-25 10:14:31下载
- 积分:1