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CYUSB3.0
USB3.0开发板资料，采用CYUSB3.0(USB3.0 development board, using CYUSB3.0)
- 2014-02-18 08:19:00下载
- 积分：1
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通信协议AHB_LITE
AHB_Lite 通信协议的FPGA Verilog 设计(AHB_Lite communication protocol Verilog design in FPGA)
- 2020-12-15 10:09:14下载
- 积分：1
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SDRAM_DDR
SDRAM_DDR控制器verilog代码及中文说明文档。(The SDRAM_DDR controller Verilog code and documentation in chinese.)
- 2013-02-06 10:48:57下载
- 积分：1
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zzlB
QUARTUSII 9.0 下的三级流水线中值滤波工程，vhdl源程序等。可用于fpga做图像预处理。(the three stage pipeline median filter project under QUARTUSII 9 , VHDL source program. which can be used by FPGA to do image preprocessing.
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- 2011-12-21 16:17:41下载
- 积分：1
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5.7
设计一个简单的FIR滤波器，并按要求确定滤波器的系统函数。(Design a simple FIR filter, and determine the filter according to the requirement of system function.)
- 2015-04-17 18:26:49下载
- 积分：1
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ofdm
这是OFDM调制matlab的程序，中间详细描述了调制的过程，希望对大家有用。(This is the OFDM modulation matlab procedures, a detailed description of the intermediate modulation process, I hope useful.)
- 2013-09-26 16:20:42下载
- 积分：1
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ps2interface
one of example about hardware design language
- 2009-12-25 07:17:18下载
- 积分：1
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Tym605V2Demo
FPGA（赛灵思）试验箱 实验程序 有Audio,Buzzer,key,ledarray,ledseg.......(FPGA（赛灵思）试验箱 实验程序Audio,Buzzer,key,ledarray,ledseg)
- 2012-02-11 21:09:19下载
- 积分：1
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一个可以综合的Verilog 写的FIFO存储器
内附文档说明
一个可以综合的Verilog 写的FIFO存储器
内附文档说明-a comprehensive Verilog can write FIFO memory attached document shows
- 2022-03-13 18:19:46下载
- 积分：1
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fir
用窗函数法设计一个线性相位FIR数字低通滤波器，用理想低通滤波器作为逼近滤波器，通带截止频率为0.2 ，阻带截止频率为0.4 ，阻带衰减不小于-40dB。(Window function method to design a linear phase FIR digital low-pass filter, as an ideal low-pass filter for approximation filter passband cutoff frequency of 0.2 stopband cutoff frequency of 0.4, the stop-band attenuation of less than-40dB.)
- 2012-09-24 13:54:07下载
- 积分：1
