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CNT60
六十进制计数器,显示0到60.可以用数码管显示。(Six decimal counter 0-60 can use the digital display.)
- 2012-10-17 19:32:56下载
- 积分:1
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WM8731_WM8731L
wm8731音频编解码芯片使用介绍,该手册里面对该芯片进行了详细的描述,对各个单元模块也进行了详细的阐述(the handbook of WM8721/WM8731L)
- 2010-05-20 10:47:30下载
- 积分:1
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DDS_BPSK
基于DDS的BPSK调制器设计Verilog源码( U57FA u4E8.08 u868)
- 2017-04-28 11:44:46下载
- 积分:1
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The VHDL source code digital clock, you can achieve at school, school grade feat...
数字钟的VHDL源程序,可以实现校时,校分等功能,并在试验箱上运行成功-The VHDL source code digital clock, you can achieve at school, school grade features, and success in the chamber is running on
- 2023-02-06 10:05:04下载
- 积分:1
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分数时延FIR
说明: 分数时延FIR滤波器FPGA设计的相关资料及软件无线电实验平台MFSS6842使用说明(Fractional delay FIR filter FPGA design related information and software radio experimental platform MFSS6842 instructions)
- 2019-11-18 22:45:35下载
- 积分:1
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一些vhdl的简单例子。直接解压,不用密码。
一些vhdl的简单例子。直接解压,不用密码。-instantiate some simple examples. Direct unpack, without a password.
- 2023-04-21 21:55:02下载
- 积分:1
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verilog 写的 “梁祝”乐曲演奏电路
verilog 写的 “梁祝”乐曲演奏电路-verilog wrote " The Butterfly Lovers" music concert circuit
- 2022-02-03 08:31:54下载
- 积分:1
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ModelSim waveform can be compared to the current functional simulation with a re...
ModelSim的波形比较的功能可以将当前仿真与一个参考数据(WLF文件)进行比较,比较的结果可以在波形窗口或者列表窗口中查看,也可以将比较的结果生成一个文本文件-ModelSim waveform can be compared to the current functional simulation with a reference (WLF paper ), the results can be compared in the waveform window or window List View, it will also compare the results generate a text file
- 2023-05-21 00:20:02下载
- 积分:1
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本书详细介绍了VHDL硬件描述语言,希望在以后的工作中能用到...
本书详细介绍了VHDL硬件描述语言,希望在以后的工作中能用到-This book details the VHDL hardware description language, want to work in the future can be used to
- 2022-05-25 00:38:07下载
- 积分:1
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7-segment
VHDL Design of BCD to 7-segment decoder
using PROM
- 2009-05-04 02:44:02下载
- 积分:1