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VGA FPGA时序仿真,仿真的PS / 2键盘接口VHDL源C.
用FPGA模拟VGA时序、模拟PS/2总线的键盘接口VHDL源代码,基于Xilinx spartan3-VGA FPGA timing simulation, simulation PS/2 keyboard interface bus VHDL source code, Based on Xilinx spartan3
- 2023-01-19 01:15:04下载
- 积分:1
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code
浙江大学体系结构实验代码 实现流水线的forwarding(Architecture, Zhejiang University Experimental code pipeline forwarding)
- 2020-09-26 11:57:46下载
- 积分:1
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基于VHDL的多功能调制解调器设计
调制解调器是在发送端通过调制将数字信号转换成模拟信号,而在接收端通过解调将模拟信号转换为数字信号的一种装置。这个程序用VHDL语言编写,实现了二进制振幅键控(2ASK)的调制与解调;二进制频移键控(2FSK)的调制与解调,二进制相位键控(2PSK)的调制与解调过程。
- 2023-09-01 14:05:04下载
- 积分:1
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介绍了硬件语言的仿真软件modelsimse的操作是使用方法,可以为入门的参考资料...
介绍了硬件语言的仿真软件modelsimse的操作是使用方法,可以为入门的参考资料-Introduction of the hardware language modelsimse operation simulation software is to use the method of reference for the entry
- 2022-02-26 21:45:07下载
- 积分:1
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raised-cosine-filter
代码实现了一个根升余弦成型滤波器,2PAM信号通过此成型滤波器,并且匹配接收,画出了发送和接收波形,验证了代码的正确性。(The code designs a root raised cosine filter,2PAM signal transmitted through the filter and matched using the same filter, I plot the transmitted signal and received signal to verify the correctness of the code.)
- 2012-11-09 21:59:53下载
- 积分:1
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blif2vhdl格式转换工具
A BLIF to VHDL converter (51K compressed tar, with SunOS, Solaris, and Linux binaries. Source code (C++) included).
- 2023-06-13 19:10:02下载
- 积分:1
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PL_2FSK
基于VHDl的2FSK调制!用的是altera的quartus11软件(Based on VHDl the 2FSK modulation)
- 2012-12-13 17:20:54下载
- 积分:1
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FIFO2
用verilog HDL语言编写的fifo存储器源文件 (Using Verilog language HDL FIFO memory source file)
- 2012-03-08 09:12:18下载
- 积分:1
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DDR(双速率)SDRAM控制器参考设计,xilinx提供
DDR(双速率)SDRAM控制器参考设计,xilinx提供-DDR (double data rate) SDRAM controller reference design for Xilinx
- 2022-11-19 10:30:03下载
- 积分:1
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04_ep2c8_vga_test
VIP FPGA板的配套例子,这个是VGA格式lcd液晶屏幕显示用。(VIP board supporting example of this is the VGA format PREVIEW.)
- 2013-10-18 19:03:37下载
- 积分:1