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iir
八阶巴特沃兹iir数字滤波器,四个二阶节,verilog代码实现,多路分时复用(batterworth,iir,8order,four second order section)
- 2016-01-27 19:49:47下载
- 积分:1
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Radix-2 FFT processor using Radix-2 Cordic Algorithm
这是使用Radix-2cordic算法的Radix-2fft处理器的工作Verilog代码
- 2022-03-12 17:49:01下载
- 积分:1
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FSK
频移键控FSK的Verilog实现,带测试文件,并在FPGA开发板上成功验证(Frequency Shift Keying FSK the Verilog implementation, with the test file, and successfully verified in FPGA development board)
- 2020-09-03 11:28:07下载
- 积分:1
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pcm
利用VHDL语言和模块化设计实现PCM编译码的功能,整体工程和代码全有。(PCM encode and decode by VHDL in Quartus2. )
- 2020-11-02 10:39:53下载
- 积分:1
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DDS
说明: 使用Verilog,以Quartus II 为平台,编写了一个DDS信号发生器程序。(Using Verilog and Quartus II as the platform, realizing the DDS signal generator program .)
- 2020-11-26 17:12:26下载
- 积分:1
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performance with rayleigh
说明: matlab bpsk with rayleigh performance expirement
- 2020-06-24 21:40:01下载
- 积分:1
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bcd
it shows bcd counter
- 2013-01-01 16:16:48下载
- 积分:1
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sdram
说明: SDRAM控制,通过VHDL语言编写可运行至133MHz。(SDRAM control, written in VHDL language, can run to 133MHz.)
- 2020-02-15 11:52:22下载
- 积分:1
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dcfifo_design_example
ALTERA发布的内部FIFO读写示例,很有参考价值,对初学者会有一定的帮助(ALTERA' s internal FIFO read and write examples of great reference value, there will be some help for beginners)
- 2010-11-13 23:31:11下载
- 积分:1
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Buzzer-music
基于FPGA实现蜂鸣器播放音乐的功能
使用芯片为EP2C8Q208C8N,使用普通蜂鸣器,由于频率不同可实现放歌功能,本例设计的是《友谊地久天长》,使用Verilog语言编程,本例子有工程文件、仿真、波形,经过测试可以使用。(Play music based on FPGA buzzer functions using chip EP2C8Q208C8N, using ordinary buzzer, since the frequency of different functions can be realized sing, in this case the design is " Auld Lang Syne" , using Verilog language programming, this project examples files, simulation, waveform, tested can be used.)
- 2016-07-05 16:15:13下载
- 积分:1