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segment
This source is used to control 7 segments on FPGA boad
- 2014-11-10 13:33:13下载
- 积分：1
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VHDL
A Full adder using half adder unit in vhdl
- 2010-01-05 11:39:14下载
- 积分：1
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SOUND_PLAY6
WM8731芯片的音效处理verilog代码，
WM8731芯片是音频ADCDAC芯片(WM8731 audio processing chip verilog code, WM8731 chip audio ADC DAC chip)
- 2013-12-14 14:12:10下载
- 积分：1
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zuoye2
主要编写了一组二进制数据通过根升余弦滤波器后的波形，但并没有使用ISE内部的FIR滤波器内核，该程序相当于编写了一个根升余弦滤波器。(Mainly prepared a set of binary data through the root raised cosine filter waveform after, but did not use the ISE internal FIR filter kernel, the program is equivalent to the preparation of a root raised cosine filter.)
- 2013-09-18 15:24:13下载
- 积分：1
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BCH3
BCH3.c,提供m<21以下的所有码长的BCH编解码模块。以供大家参考。谢谢(BCH encoder&decoder GF(2^m) m<21)
- 2021-01-26 11:58:36下载
- 积分：1
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cloc
时钟在单片机中的应用，用于控制中断及显示程序(Clock in the MCU application, used to control interrupt and display program)
- 2013-06-04 15:27:35下载
- 积分：1
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3.3
布尔乘法器带testbench好用的工程啊(Boolean multiplier works with testbench nice ah)
- 2011-07-26 10:53:51下载
- 积分：1
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pipelined_fft_256
verilog编写的并行256点fft代码(Verilog prepared parallel 256 points fft code)
- 2017-06-28 21:56:53下载
- 积分：1
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IOLED
基于单片机显示原理的IO和LED显示原理(Based on the principle of IO chip and LED display shows the principle)
- 2011-09-02 17:09:24下载
- 积分：1
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freq
vhdl八位十进制数字频率计的设计，顶层和数码管扫描模块(vhdl eight decimal digital frequency meter design, top-level and digital tube scanning module)
- 2012-10-09 15:09:22下载
- 积分：1
