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clk_div3
在fpga中对于pll无法完成的分频,可采用计数方式,本例用状态机实现对时钟的奇数分频。(Pll in fpga can not be completed in the sub-frequency counting method can be used, in this case with the state machine to achieve an odd number on the clock frequency.)
- 2010-07-28 20:03:41下载
- 积分:1
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针对于Virtex5FPGA的DDR2读写测试的完整工程
资源描述针对于Virtex5FPGA的DDR2读写测试的完整工程,已测试可以使用,可以根据自己的ddr2配置自行更改。。。。
- 2023-02-19 21:40:05下载
- 积分:1
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LDPC码的消息节点(Bitnode)消息更新过程的VHDL语言实现
LDPC码的消息节点(Bitnode)消息更新过程的VHDL语言实现-LDPC code of the message node (Bitnode) news update process of the VHDL language
- 2022-12-16 00:40:03下载
- 积分:1
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04_ep2c8_vga_test
VIP FPGA板的配套例子,这个是VGA格式lcd液晶屏幕显示用。(VIP board supporting example of this is the VGA format PREVIEW.)
- 2013-10-18 19:03:37下载
- 积分:1
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PIP
基于FPGA的画中画处理PDF技术文档,采用SD卡里图片读出来做为底图,然后再图上叠加另外一个图片或者视频(Based on the FPGA picture in picture processing PDF technical documentation
)
- 2014-07-10 17:56:04下载
- 积分:1
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并串转换模块,内含有另个.vhd文件。一个是自己写的比较简单 另一个是参考的。...
并串转换模块,内含有另个.vhd文件。一个是自己写的比较简单 另一个是参考的。-And the string conversion module, which contains another one. Vhd file. One is its relatively simple to write the other is the reference.
- 2022-01-25 21:05:32下载
- 积分:1
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一个异步FIFO的verilog实现论文
一个异步FIFO的verilog实现论文-err
- 2022-01-28 06:08:18下载
- 积分:1
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UART
本代码用verilog语言配合sopc和nios实现了串口调试的目的。软件编程用C语言描述,只是比较简单的例子,适合初学者做了解用,本人亲自在EP2C8Q上实践。(The code to use verilog language sopc and nios achieved with serial debugging purposes. Software programming using C language description, but relatively simple example for beginners to do with understanding, I personally EP2C8Q on practice.)
- 2013-09-11 10:48:17下载
- 积分:1
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rs_204_188----v1.0
RS 编码和解码Verilog Code, 实现了RS(204,188)的编码和译码;(RS Coding and Decoding Verilog code, implement RS(204,188) )
- 2021-03-25 20:29:14下载
- 积分:1
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01_test
FPGA测试程序,仅供测试硬件是否能够运行,主要功能是点亮运行指示灯(The main function of the test program of FPGA is to light the running indicator.)
- 2019-06-20 03:21:28下载
- 积分:1