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uart
用verilog语言编写的串口读写程序，波特率可调，亲测可用。(this is a program for UART by verilog, which is useful.)
- 2015-10-24 14:46:46下载
- 积分：1
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inc_pid
基于FPGA的增量式PID设计方法，Matlab、Simulink， Xilinx Block set(Incremental PID FPGA-based design methodology)
- 2014-11-03 04:16:19下载
- 积分：1
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93 std
-- Booth Multiplier
-- This file contains all the entity-architectures for a complete
-- k-bit x k-bit Booth multiplier.
-- the design makes use of the new shift operators available in the VHDL-93 std
-- this design passes the Synplify synthesis check
-- download from: www.fpga.com.cn & www.pld.com.cn--- Booth Multiplier-- This file contains a ll the entity-architectures for a complete-- k- bit x k-bit Booth multiplier.-- the design mak es use of the new shift operators available in th e VHDL-93 std-- this design passes the Synplify synthesis check-- download from : www.fpga.com.cn
- 2022-02-25 16:35:00下载
- 积分：1
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submodule
verilog 双模块算术平均值计算模块，子模块在时钟上升沿技术，高层模块根据当前计数值计算算数平均(verilog double module arithmetic mean calculation module, sub-module in the clock rising edge technology, high-level module is calculated based on arithmetic average of the current count)
- 2011-01-05 22:49:16下载
- 积分：1
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hilbert_m
基于FPGA的希尔伯特变化的verilog代码(Hilbert change verilog code)
- 2020-10-19 09:37:25下载
- 积分：1
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LAB22
应用verilog编程语言控制VGA显示屏显示一幅图片。(Application verilog programming language control VGA display shows a picture.)
- 2016-10-27 16:30:12下载
- 积分：1
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VHDL_freerisc8
说明： 一个8位RiSC单片机的VHDL代码，
具有很好的参考价值。(an eight RiSC SCM VHDL code, is a good reference value.)
- 2006-02-15 10:58:14下载
- 积分：1
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uart
一个实用的uart协议模块，使用verilog 实现(A practical uart protocol modules, use verilog to achieve)
- 2013-07-25 11:43:34下载
- 积分：1
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222
说明： VHDL BISS,SSI,ENDAT2.2, ENCODER
- 2020-11-24 17:46:39下载
- 积分：1
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mallet algirithm
FPGA（现场可编程门阵列）在医疗系统中得到广泛的接受
- 2022-01-26 04:06:00下载
- 积分：1
