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基于 FPGA 的 VGA
本代码是基于可编程门阵列flield视频图形阵列实现。该代码是使用Verilog
- 2022-03-22 21:24:07下载
- 积分:1
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05_fifo_test
说明: FIFO: First in, First out 代表先进的数据先出,后进的数据后出。Xilinx 在 VIVADO 里为我们已经提供了 FIFO 的 IP 核, 我们只需通过 IP 核例化一个 FIFO,根据 FIFO 的读写时序来写入和读取FIFO 中存储的数据。(FIFO: first in, first out represents the first out of advanced data, and the last in data is the last out. Xilinx has provided us with the IP core of FIFO in vivado. We only need to instantiate a FIFO through the IP core, and write and read the data stored in FIFO according to the FIFO read-write timing.)
- 2021-04-08 22:19:20下载
- 积分:1
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prac2
VHDL implementation using mouse and monitor
- 2009-06-28 20:10:56下载
- 积分:1
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I2C_master_code
主要介绍,I2C总线主设备发送数据给从设备,代码实现是用Verilog语言实现的,对硬件设计者有很大好处(Introduces, I2C bus master to send data to the slave device, code is implemented in Verilog language, the hardware designer of great benefit)
- 2011-07-12 14:31:11下载
- 积分:1
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Design-of-taxi-meter-Based-on-FPGA
本文分析了当前国内外出租车计费系统的基本组成和工作原理及主要的两种设计方式:基于单片机的设计方式和基于FPGA的设计方式;并对这两种实现方式的优点和缺点进行分析,比较后确定本系统的方案:基于FPGA的出租车计费系统的设计。(This paper analyzes the current taxi charging system at home and abroad, working principle and basic components of two major design approach: the design methods based on single chip FPGA-based design approach and the two implementations to analyze the strengths and weaknesses, After comparing the program to determine the system: FPGA-based taxi billing system.)
- 2011-05-11 15:38:37下载
- 积分:1
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Signed-Arithmetic-in-Verilog-2001
有符号数的完整讲义和例子Verilog 2001(Signed Arithmetic in Verilog 2001, paper with examples)
- 2011-01-18 17:15:09下载
- 积分:1
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danjibeipin
有单极倍频功能的matlab spwm逆变器(Unipolar multiplication function the the matlab spwm of inverter)
- 2012-11-04 21:07:49下载
- 积分:1
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有限状态机
有限状态机的一段式、二段式以及三段式写法的对比
- 2022-02-13 17:05:25下载
- 积分:1
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1920*1080的VGA驱动模块设计
作为一种古老的接口,支持的分辨率远高于HDMI和DVI,1920分辨率根本不在话下,本设计在QUARTUS下设计,编译,加载运行通过效果良好。
- 2023-02-28 11:15:04下载
- 积分:1
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led_test
在Quartus II 上编程的基于FPGA的LED显示实验(Programming in the Quartus II LED display experiment based on FPGA
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- 2013-08-13 08:55:45下载
- 积分:1