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ddr3_model
一个verilog语言开发编写的简单的ddr3模型(A simple model ddr3, written with verilog language)
- 2020-08-26 17:38:13下载
- 积分:1
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VHDL example code
电路酒窖杂志的vhdl示例。vga控制器、视频发生器等PS2鼠标vhdl
- 2022-05-06 09:12:27下载
- 积分:1
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SoftCore_LED80-master
说明: 使用VHDL实现的LED-80分组密钥,相对于其它密钥具有硬件实现面积更小的特点(vhd code of a lightweight block cipher LED-80)
- 2020-03-24 20:57:31下载
- 积分:1
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UG586-7SeriesDMIUserGuide
UG586 - Zynq-7000 All Programmable SoC and 7 Series Devices Memory Interface Solutions v2.3 User Guide ( ver2.3, 18511 KB )(UG586- Zynq-7000 All Programmable SoC and 7 Series Devices Memory Interface Solutions v2.3 User Guide ( ver2.3, 18511 KB ))
- 2015-02-05 20:02:21下载
- 积分:1
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SONY公司出品的黑白CCD(44万像素)ICX229的驱动信号产生程序
SONY公司出品的黑白CCD(44万像素)ICX229的驱动信号产生程序-SONY company produced black-and-white CCD (44 megapixels) ICX229 the drive signal generation process
- 2022-04-17 08:51:11下载
- 积分:1
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designers guide to vhdl(third edition)
说明: designers guide to vhdl(third edition)这本书好像在国外vhdl入门中挺流行的, 爱思维尔有资源,但是是各个章节散装的, 我把它们合成了(The book designers guide to vhdl (third edition) seems to be very popular in foreign vhdl entry. Ixel has resources, but it is a loose chapter of each chapter, I synthesized them)
- 2021-01-14 16:23:11下载
- 积分:1
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32位-33M 从模式(target)PCI接口参考设计_lattice
说明: 32位/33M 从模式(target)PCI接口参考设计,Lattice提供。由于PCI时序较复杂,此设计仅能供参考(32/route from the model (target) PCI reference design, Lattice provided. Because PCI timing more complicated, and the design for reference only)
- 2005-10-24 19:35:04下载
- 积分:1
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ml505_mig_design
Xilinx开发板ML505的DDRII示例程序,使用Verilog,调用MIG,编译环境ISE11.1(Xilinx ML505 development board of DDRII sample program, using Verilog, called MIG, build environment ISE11.1)
- 2010-05-13 02:39:04下载
- 积分:1
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AD
说明: FPGA控制AD7321的模块,是本人亲自试验过的。有Verilog源码,和简单文档。(FPGA control module of the AD7321 is personally tested. There Verilog source code, and simple document.)
- 2009-08-18 20:31:53下载
- 积分:1
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project_1
简单的一个Verilog小程序,适合刚接触的人群(A simple Verilog small program, suitable for people just contact)
- 2020-06-16 22:20:01下载
- 积分:1