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i2c
说明： 本文研究的IIC总线控制器具有如下特征
1.兼容飞利浦I2C标准，以主机模式与外围设备进行数据通信，对IIC从机模型进行读/读，读/写，写/写，写/读[18]。
2.多主操作
3.软件可编程时钟频率
4.时钟拉伸和等待状态生成
5.软件可编程确认位
6.时钟同步设计
7.仲裁中断丢失，自动转移取消
8.开始/停止/重复启动检测/确认生成
9.总线忙检测(The IIC bus controller studied in this paper has the following characteristics.
1. Compatible with Philips I2C standard, data communication between host mode and peripheral devices, read/read, read/write, write/write, write/read for IIC slave model [18].
2. Multiple Main Operations
3. Software programmable clock frequency
4. Clock stretching and waiting state generation
5. Software Programmable Confirmation Bit
6. Clock Synchronization Design
7. Loss of arbitration interruption and cancellation of automatic transfer
8. Start/Stop/Repeat Start Detection/Verification Generation
9. Bus busy detection)
- 2019-06-18 12:18:10下载
- 积分：1
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a_sistolic_FFT_architecture_for_FPGA
Description of a sistolic arhictecture for a FFT implementation in FPGA.
- 2009-03-24 18:12:27下载
- 积分：1
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pinlvji
使用FPGA测量频率大小，并且在数码管上进行显示(Frequency measurement using FPGA and display on digital tube)
- 2020-06-18 10:20:02下载
- 积分：1
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multiply
由verilog编写的乘法器，通过两个文件的调用实现。由于子模块的调用使得程序简化了许多。(Prepared by the Verilog multiplier, through the realization of the two documents call. As the sub-modules to simplify the procedure call makes a lot.)
- 2008-12-30 20:51:33下载
- 积分：1
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PiSo
8位并行输入的数转换成串行输出，是基于高级硬件编程语言VHDL编写的。(8-bit parallel input into serial output digital conversion is based on the high-level hardware programming language VHDL prepared.)
- 2020-11-30 21:59:27下载
- 积分：1
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Netfpga full 213
下一代无线通信系统功能高度动态配置，在那里的循环前缀长度变化的传输方式，框架结构，与更高级别的协议。
- 2022-02-24 17:13:07下载
- 积分：1
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sobel 边缘检测
这 VHDL/Verilog 或 C/c + + 源代码并作为设计参考说明了如何实现这些类型的功能。这是用户的责任，来验证其设计的一致性和使用形式化验证方法的功能。
- 2022-06-30 04:07:25下载
- 积分：1
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fft_16
16点FFT，简单易理解，适合初学者了解(16 point FFT, simple and easy to understand, suitable for beginners to understand)
- 2018-05-07 16:20:10下载
- 积分：1
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hdb3_v3
Quartus环境下使用Verilog编写的HDB3编解码程序，RTL和时序仿真已过(Quartus under the environment of a HDB3 protocol procedures written in Verilog, RTL and timing simulation has be passed)
- 2015-11-24 21:56:05下载
- 积分：1
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sin_10k
基于FPGA的利用rom进行查询的方式生成一个频率为10KHZ的sin信号，编译成功，并实现功能仿真。(Query based on the the FPGA use of rom generate a frequency of 10 kHz sin signal, compiled successfully and to achieve functional simulation.)
- 2013-04-23 10:47:17下载
- 积分：1
