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AVS motion compensation circuit of VLSI Design and Implementation of a standard...
AVS运动补偿电路的VLSI设计与实现
提出了一种基于AVS标准的高效的运动补偿电路硬件结构，该设计采用了8 X 8块级流
水线操作，运动矢量归一化处理和插值滤波器组保证了流水线的高效运行以及硬件资源的最优
利用。采用Verilog语言完成了VLSI设计，并通过EDA软件给出仿真和综合结果。-AVS motion compensation circuit of VLSI Design and Implementation of a standard based on the AVS motion compensation circuit efficient hardware structure, the design used 8 X 8 block-level pipelining, the normalized motion vector processing and interpolation filter bank guarantee efficient operation of the pipeline, as well as the optimal use of hardware resources. Using Verilog language completed VLSI design and EDA software through simulation and synthesis results.
- 2022-01-21 20:19:47下载
- 积分：1
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CAN驱动器-MCP2515-接口程序-Verilog
CAN驱动器MCP2515驱动，verilog编写，实测可用(CAN driver MCP2515 driver, Verilog written, measured available)
- 2020-12-28 15:29:02下载
- 积分：1
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This tutorial presents an introduction to Altera’s Nios R
II processor, which...
This tutorial presents an introduction to Altera’s Nios R
II processor, which is a soft processor that can be in-
stantiated on an Altera FPGA device. It describes the basic architecture of Nios II and its instruction set. The NiosII processor and its associated memory and peripheral components are easily instantiated by using Altera’s SOPCBuilder in conjuction with the Quartus R II software.
- 2023-06-21 11:25:02下载
- 积分：1
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A brief introduction of direct digital frequency synthesis (DD S), the use of DD...
简单介绍了直接数字频率合成技术(DD S)，利用DDS设计任意
波形发生器，其能够产生矩形波、正弦波、三角波、锯齿波等多种波形 -A brief introduction of direct digital frequency synthesis (DD S), the use of DDS design of arbitrary waveform generator, which can produce rectangular wave, sine wave, triangle wave, sawtooth waveform etc.
- 2022-04-02 02:31:45下载
- 积分：1
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用vhdl实现24小时计数器，方法简单实用。 仿真环境MAXPLUS
用vhdl实现24小时计数器，方法简单实用。 仿真环境MAXPLUS--use VHDL to achieve 24-hour counter, simple and practical method. Simulation environment Segments-
- 2022-03-24 12:46:20下载
- 积分：1
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SRAM 简单测试
SRAM简单测试，测试其性能及其速度，判断SRAM是否可用(Test its performance and speed to determine if SRAM is available)
- 2020-07-10 09:58:55下载
- 积分：1
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power_control
四轴动力模块，用一个顶模块控制，输入有：油门（20档）；指令；水平仪控制指令，4个输出口(Axis power modules, with a top module control inputs are: accelerator (20 files) instruction Level control instructions, four output ports)
- 2013-12-26 20:57:03下载
- 积分：1
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i2c
uboot i2c driver code for arm a5 dual core cpu imapx820, which is an soc of infotmic.
- 2012-10-18 21:51:29下载
- 积分：1
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delayline_b
基于延迟线的数字脉冲宽度调制，用于电力电子设备的触发信号产生(puls wide modulator based on delayline)
- 2015-03-10 15:45:01下载
- 积分：1
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摘要：本文主要介绍以CPLD 芯片进行十字路口的交通灯的设计，用CPLD 作为交通灯控制器的主控芯片，采用VHDL
语言编写控制程序，利用CPLD的可重复编...
摘要：本文主要介绍以CPLD 芯片进行十字路口的交通灯的设计，用CPLD 作为交通灯控制器的主控芯片，采用VHDL
语言编写控制程序，利用CPLD的可重复编程和在动态系统重构的特性，大大地提高了数字系统设计的灵活性和通用性。
关键词：CPLD；VHDL；交通灯控制器
中图分类号：TP39
Abstract ：This paper introduces the electronic-traffic lamp, which is based on the VHDL and is completed by-Abstract: This paper introduces the CPLD chip to the traffic lights at the crossroads of design, traffic lights with CPLD as the master controller chip, the use of VHDL language control procedures, the use of CPLD re-programming and dynamic system reconfiguration in the features greatly enhance the digital system design flexibility and versatility. Keywords: CPLD VHDL traffic lights controller CLC number: TP39 Abstract: This paper introduces the electronic-traffic lamp, which is based on the VHDL and is completed by
- 2022-05-20 22:55:36下载
- 积分：1
