-
7x7块交织器的FPGA设计
基于FPGA的7x7块交织器设计，程序分交织、解交织两部分，并在QUARTUS II 9.0 下仿真通过，内附模块详细端口说明及仿真分析文件。
- 2022-12-16 23:40:03下载
- 积分：1
-
The use of long
利用电话远程系统，通过密码验证来实现对家庭电器的智能控制。-The use of long-distance telephone system, via a password to verify the implementation of the intelligent control of household electrical appliances.
- 2022-01-31 17:55:43下载
- 积分：1
-
SCAN_LED
基于EDA技术中的对LED扫描电路的实验，程序能成功运行，能直接在开发板上看实验结果(EDA-based LED technology to scan the experimental circuit, the program can run successfully, can see directly in the development of on-board results)
- 2009-06-05 11:49:53下载
- 积分：1
-
Verilog
32位存储器Verilog附带test文件，可以在modulesim仿真
还有加法、减法器，译码器等常用Verilog器件，都附带仿真test。(Memory test with Verilog)
- 2010-07-17 17:20:00下载
- 积分：1
-
cfo_correction
说明： OFDM载波同步，Verilog编写，完全正确！！！(verilog )
- 2020-11-05 21:39:50下载
- 积分：1
-
truck_lights
Lights, Car light emulator for turn, stop and emergency
- 2012-11-06 18:27:06下载
- 积分：1
-
VGA的IP核，下载即可用，解压到指定目录下就可以了，参照里面的read me....
VGA的IP核，下载即可用，解压到指定目录下就可以了，参照里面的read me.-VGA
- 2022-02-02 20:02:28下载
- 积分：1
-
EasyWifiRadar
EasyWifiRadar.zip r ok
- 2014-04-12 20:24:43下载
- 积分：1
-
uart-for-fpga
Simple UART for FPGA is UART (Universal Asynchronous Receiver & Transmitter) controller for serial communication with an FPGA. The UART controller was implemented using VHDL 93 and is applicable to any FPGA.
Simple UART for FPGA requires: 1 start bit, 8 data bits, 1 stop bit!
The UART controller was simulated and tested in hardware.
- 2020-06-24 22:00:02下载
- 积分：1
-
ag-overview
agilex fpga description
- 2019-05-13 18:21:04下载
- 积分：1
