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CY7C63723
CY7C63723 功能及其引脚描述,外围电路和仿真数据(The CY7C637 is an 8-bit RISC OTP microcontroller.)
- 2009-07-13 14:30:05下载
- 积分:1
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uart
uart发射机Verilog HDL代码(Verilog HDL code uart transmitter)
- 2011-05-21 21:37:01下载
- 积分:1
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vjtag
说明: quartus vitual jtag代码使用接口,通过该接口模板方便使用者通过jtag在线读取FPGA的数据。(The quartus virtual JTAG code uses an interface, through which users can read FPGA data online.)
- 2020-05-06 09:42:50下载
- 积分:1
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FPGA_SSI
说明: 文档中的verilog代码实现了FPGA与SSI总线的数据协议链接(Verilog code in the document of the FPGA data bus protocol and SSI links)
- 2021-04-19 17:08:51下载
- 积分:1
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Elevator designed to control the lift design 6 original VHDL language
电梯的设计・用来控制6层的电梯设计原来・VHDL语言-Elevator designed to control the lift design 6 original VHDL language
- 2022-02-06 15:18:21下载
- 积分:1
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The_Ten_Commands_of_Excellent_Design
介绍了FPGA设计的十大准则,对初学者很有用,对于工作多年的同志,也会有整理总结的好处(Describes the FPGA design of the top ten criteria are useful for beginners, for many years comrades, there will be finishing the benefits of the summary)
- 2009-09-26 16:44:29下载
- 积分:1
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lab2
说明: 使用vivado和Xilinx开发板实现抢答器,开发板为Xilinx Artix-7(Using vivado and Xilinx development board to achieve the responder, the development board is Xilinx artix-7)
- 2021-04-23 01:58:48下载
- 积分:1
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基于FPGA的VHDL的电子琴
自己去年做的实训项目,基于FPGA的VHDL的电子琴,可实现自动演奏与手动演奏,手动演奏是用PS2键盘听过按键来实现电子琴的发音,并且用VGA显示音符与音键,本设计采用模块化设计,底层使用代码,通过例化成原理图,最终在底层实现原理图之间的连接。
- 2023-03-08 06:35:04下载
- 积分:1
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This program is Verlog language program, using QUARTUS6.0 preparation, program i...
本程序为Verlog语言程序,采用QUARTUS6.0编写,程序实现的功能是控制AD2S80的转换和和数据总线上数据的读取-This program is Verlog language program, using QUARTUS6.0 preparation, program implementation function is to control the conversion and AD2S80 and data bus to read data
- 2022-02-10 16:51:45下载
- 积分:1
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vhdl
vhdl cpu芯片逻辑设计的一部分实现 只有一小部分 大家可以看一下 寄存器 加法器之类的(vhdl cpu chip logic design part of its implementation only a little part everry look and see b=about registers adder and so on)
- 2012-09-23 16:57:41下载
- 积分:1