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apb timer
说明: 是基于apb总线下的timer外设的rtl代码,主要包括apb_timer的master逻辑verilog,以及相应的开发文档,包括寄存器的描述,功能特性等。(RTL code is based on timer peripheral under APB bus, which mainly includes master logic Verilog of apb_timer and corresponding development documents, including the description of registers, functional characteristics and so on.)
- 2019-01-25 16:54:02下载
- 积分:1
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LDPC编译码
LDPC编译码,最新一代纠错码技术,自带校验矩阵,数据程序内带测试数据
- 2022-01-26 04:09:36下载
- 积分:1
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ICAP 回读处理
通过 ICAP 回读 FPGA内部state register 的状态值。通过状态机控制ICAP,然后写入命令,读取数据,等待三个周期后出现数据。过程中CSIB和RDWRB有一个时序关系,还需要对ICAP输入命令进行bit swap
- 2022-04-10 01:05:17下载
- 积分:1
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通訊8B/10B解碼
這是一般通訊介面會採用的8B/10B 解碼, 應用在光纖通訊, Serdes上均有廣泛應用
/* Module Description:
This module implements a 8b10b decoder according to the original patent work
of Widmer and Franaszek. It is a synchronous module with registers on the input
and output. It takes in a 10-bit 8b10b encoded word, and outputs and 8-bit data
word and a control bit to indicate if the 8-bit output data is one of 12 special
K-codes.
*/
- 2023-05-12 06:10:02下载
- 积分:1
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robust_fir_latest.tar
滤波器 Generaic FIR Filter(Generaic FIR Filter)
- 2011-11-17 15:51:23下载
- 积分:1
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Tym605V2Demo
FPGA(赛灵思)试验箱 实验程序 有Audio,Buzzer,key,ledarray,ledseg.......(FPGA(赛灵思)试验箱 实验程序Audio,Buzzer,key,ledarray,ledseg)
- 2012-02-11 21:09:19下载
- 积分:1
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zhaozhou_verilog
usb3.0 物理层仿真,verilog编程(Start the physical simulation)
- 2014-04-04 11:49:09下载
- 积分:1
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fpga2
FPGA学习的非常好的资料,希望广大朋友都可以学习学习啊(FPGA to learn very good information, I hope our friends can learn ah)
- 2013-05-28 22:09:28下载
- 积分:1
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prueba
Test for VHDL just a student version
- 2016-11-17 18:49:33下载
- 积分:1
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vote7
说明: 自己设计的一个其人投票系统,对于VHDL初学者可以参考下(One of their own design their human voting system, for VHDL beginners can refer to the following)
- 2009-08-30 09:25:04下载
- 积分:1