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sin
基于单片机的DDS数字信号发生器设计，可以产生正弦波。三角波等(Design of DDS digital signal generator based on MCU, can produce sine wave. Triangular wave)
- 2013-04-03 18:24:00下载
- 积分：1
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CYUSB3.0
USB3.0开发板资料，采用CYUSB3.0(USB3.0 development board, using CYUSB3.0)
- 2014-02-18 08:19:00下载
- 积分：1
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FFT_64
64点FFT设计，基于FPGA频域的设计PPT，基4算法(64 point FFT design, based on FPGA frequency domain design, PPT, base 4 algorithm)
- 2021-01-14 16:08:48下载
- 积分：1
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寄存器的VHDL源码.可能有点简单 新手大家间量 希望和大家学习...
寄存器的VHDL源码.可能有点简单 新手大家间量 希望和大家学习-VHDL source register. May be a bit simple volume between novice you would like to learn
- 2022-12-21 02:40:03下载
- 积分：1
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LCD1602
通过编写verilog语言完成数据的在液晶LCD1602显示(By writing verilog language to complete the data displayed on the LCD LCD1602)
- 2013-08-04 13:12:05下载
- 积分：1
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This an interpolating by 2 half
This an interpolating by 2 half-band filter with 79 taps (40 none-zero coefficients).
- 2022-03-06 22:11:21下载
- 积分：1
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PiSo
8位并行输入的数转换成串行输出，是基于高级硬件编程语言VHDL编写的。(8-bit parallel input into serial output digital conversion is based on the high-level hardware programming language VHDL prepared.)
- 2020-11-30 21:59:27下载
- 积分：1
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VHDL实现的8位乘法器，所有仿真全部通过
VHDL实现的8位乘法器，所有仿真全部通过-VHDL to achieve 8-bit multiplier
- 2022-01-24 12:51:20下载
- 积分：1
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FRFT_Ozaktas
这是分数阶傅里叶变换FRFT的土耳其算法的FPGA实现的程序，FPGA是Xilinx的virtecx-5，这是我在做毕业设计的时候自己编写的，希望能对你有帮助！(This is the fractional Fourier transform algorithm FRFT Turkish FPGA implementation of the program, FPGA is the Xilinx virtecx-5, which is what I was doing graduate design time I have written, I hope you can help!)
- 2021-03-12 10:49:25下载
- 积分：1
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P4 (3)
支持{addu、subu、lui、ori、jal、jr、lw、sw、nop}指令集的单周期CPU，verilog硬件描述语言实现(Support {addu, subu, lui, ori, jal, jr, lw, sw, nop} instruction set of one-cycle CPU, Verilog hardware description language implementation)
- 2018-12-02 17:22:40下载
- 积分：1
