登录
首页 » VHDL » New FPGA

New FPGA

于 2023-03-23 发布 文件大小:91.60 kB
0 145
下载积分: 2 下载次数: 1

代码说明:

基于FPGA的新型数据位同步时钟提取(CDR)实现方法-New FPGA-based data bit sync clock extraction (CDR) method

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • 基于Nios II开发板的VGA控制器的DE1控制…
    基于NIOS II 的DE1开发板的VGA 控制器VGA控制模块主要控制VGA模块的开始和其运行的状态,需要写一个Avalon 从端口响应CPU的控制信号,继而控制整个模块的运行,-Based on the DE1 of the NIOS II development board VGA controller to control the VGA module VGA main control module and its operation began, and the need to write a response to Avalon from the CPU ports of the control signal, and then control the operation of the entire module,
    2023-07-07 19:50:03下载
    积分:1
  • cpu-maxplus
    MaxplusII编写的简易cpu,可实现简单加减法等操作(MaxplusII summary prepared by the cpu can realize simple addition and subtraction, etc)
    2007-06-08 17:55:10下载
    积分:1
  • HDB3_encoder_QuartusPrj
    说明:  HDB3编码Quartus2 10.0的工程,modelsim仿真,有实物图、仿真图以及源程序,适合做通信原理课程设计的同学参考使用(HDB3 encoding Quartus2 10.0 project, modelsim simulation, there are physical map, simulation diagrams and source code, suitable for students of communication theory courses designed for reference use)
    2011-03-25 08:35:32下载
    积分:1
  • 4
    通过监测工作状态实现带有IIC通讯功能的数据发送接收(to implement the sending and receiving data function of iic communication )
    2013-09-29 09:51:55下载
    积分:1
  • EPM570
    非常好的EPM570(CPLD)学习程序源码,适合初学者,能让其快速入门(Very good EPM570 (CPLD) learning program source code, suitable for beginners, allowing its Quick Start)
    2013-09-11 10:18:59下载
    积分:1
  • mmuart
    简单uart,verilog语言编写,已经经过测试,有需要的可以看看(Simple uart, Verilog language, has been tested, you can see if you need it)
    2020-06-23 20:00:01下载
    积分:1
  • lab4
    lab report for lab 4
    2019-04-17 21:17:08下载
    积分:1
  • 用max+plusII编写的vhdl程序 乒乓球游戏机
    用max+plusII编写的vhdl程序 乒乓球游戏机-with max plusII vhdl procedures for the preparation of the table tennis game
    2022-03-04 06:41:57下载
    积分:1
  • PWM_LED
    基于DE2_70平台,编写nios软核c代码,控制流水灯,硬件实现验证通过,适合入门(Based DE2_70 platform, written nios soft core c code, control water lights, verified by hardware implementation, suitable for entry)
    2014-07-21 11:48:06下载
    积分:1
  • DPLL
    基于VHDL语言的DPLL电路的设计,给出了设计方案和部分源代码 (DPLL)
    2010-05-11 19:34:11下载
    积分:1
  • 696516资源总数
  • 106571会员总数
  • 2今日下载