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vivado_LED_Flow
本例程使用vivado2014.4工具，利用xilinx Basys3 实验板实现板载流水灯的两种模式控制。(This project uses verilog HDL to realize the the control of 16 leds loaded on Xilinx Basys3 board.)
- 2016-04-19 10:19:07下载
- 积分：1
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using_memory_allocation_mger
vmm primer的使用使用文档，和之前vmm primer源代码配套使用！(vmm the primer use of the use of the document, and before supporting vmm the primer the source code to use!)
- 2012-12-23 22:43:30下载
- 积分：1
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NEW
Verilog投币式手机充电仪
清华大学数字电子技术基础课程EDA大作业。刚上电数码管全灭，按开始键后，数码管显示全为0。输入一定数额，数码管显示该数额的两倍对应的时间，按确认后开始倒计时。输入数额最多为20。若10秒没有按键，数码管全灭。(Verilog coin operated cell phone charger
EDA major homework of digital electronic technology foundation course, Tsinghua University. Just put on the digital tube completely extinguished, press the start button, the digital tube display is 0. Enter a certain amount, the digital tube shows the amount of double the corresponding time, according to the confirmation began countdown. The maximum amount of input is 20. If there is no button in 10 seconds, the digital tube will die out.)
- 2020-12-10 16:29:20下载
- 积分：1
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dct
基于FPGA的图像压缩算法程序，自己写的，可以参考一下(FPGA-based image compression algorithm, write your own, you can refer to)
- 2011-10-23 00:54:17下载
- 积分：1
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Hardware Description Language VHDL of the frequency counter program can be used...
硬件描述语言VHDL的频率计程序,可用于做实验,或者初学者借鉴.-Hardware Description Language VHDL of the frequency counter program can be used for experiments, or the beginners learn.
- 2023-01-23 07:20:04下载
- 积分：1
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用VHDL编写简单的直流电机控制方法.供大家参考.
用VHDL编写简单的直流电机控制方法.供大家参考.-use VHDL to prepare a simple DC motor control methods. For your reference.
- 2022-07-09 16:31:01下载
- 积分：1
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（1）距离算法研究和设计；
（2）采用FPGA/CPLD实现。
（1）距离算法研究和设计；
（2）采用FPGA/CPLD实现。
-(1) distance algorithm and design (2) using FPGA/CPLD implementation.
- 2022-08-13 17:17:05下载
- 积分：1
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vending-machine
用Verilog实现自动售货机功能，代码较初级。易懂，内含test文件。(Automatic vending machines function with Verilog code than the primary. Understandable, containing test files.)
- 2013-11-30 20:25:34下载
- 积分：1
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In this case is a convolutional code on a simple algorithm, using verilog HDL la...
本例是关于卷积码的一个简单算法，用verilog HDL语言编写，整个文档包括了产生卷积的整个工程。-In this case is a convolutional code on a simple algorithm, using verilog HDL language, the entire document, including the method of deconvolution of the whole project.
- 2022-02-05 20:03:55下载
- 积分：1
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verilog程序设计教程，适合初学者。
verilog程序设计教程，适合初学者。-verilog programming tutorial for beginners.
- 2023-03-06 05:00:04下载
- 积分：1
