-
verilog___UART
Verilog 编写的串口通信模块 带测试代码(Verilog prepared by the serial communication module with a test code)
- 2012-05-24 20:38:27下载
- 积分:1
-
spi_ad
FPGA与DAC芯片的SPI接口驱动,实现串行数据的传输。(Realizing the communication between FPGA and DA chip)
- 2017-06-23 12:38:22下载
- 积分:1
-
Zedboard
上传的是基于Xilinx的新出的开发板Zedboard的一个简单的知道文档,希望对有关同学有所帮助。(Uploaded a simple know the document based on Xilinx' s new development board Zedboard the hope that some of the students to help.)
- 2012-12-17 15:48:11下载
- 积分:1
-
FPGA realize for a good vga display routines, vhdl language.
针对FPGA一个实现vga显示的很好的例程,vhdl语言编写。-FPGA realize for a good vga display routines, vhdl language.
- 2022-01-24 09:45:51下载
- 积分:1
-
Verilog_HDL源码, Verilog_HDL源码
Verilog_HDL源码, Verilog_HDL源码-Verilog_HDL source, Verilog_HDL FO
- 2022-06-21 00:23:39下载
- 积分:1
-
基于Actel A3P030 FPGA液晶显示器使用jdl12864串行接口,时钟可调
基于Actel A3P030 FPGA,液晶采用JDL12864串行接口,时钟48MHz-Based on Actel A3P030 FPGA, LCD using JDL12864 serial interface, clock 48MHz
- 2022-07-05 03:00:11下载
- 积分:1
-
6通道正弦波发生器,产生频率,相位,幅值都可调的正弦波形...
6通道正弦波发生器,产生频率,相位,幅值都可调的正弦波形-6-channel sine wave generator, resulting in frequency, phase, amplitude of the sinusoidal waveform are adjustable
- 2022-10-22 04:00:03下载
- 积分:1
-
DDS波形发生器
DDS波形生成器verilog语言书写(FPGA型号cy4以上)(DDS generate verilog)
- 2017-07-17 22:25:11下载
- 积分:1
-
yunchengxu
说明: 内附几十种小程序,有状态机、比较器、波形发生器、乘法器、加法器、步进电机控制器等,希望大家能用的上。(Containing dozens of small programs, for reference,This is about FPGA,a tool ,we can study,but in ourselves.)
- 2010-04-29 16:00:25下载
- 积分:1
-
vhdl 实验报告 verilog rs触发器 vhdl实验 vhdl 实验 报告 verilog rs触发器 vhdl实验...
vhdl 实验报告 verilog rs触发器 vhdl实验 vhdl 实验 报告 verilog rs触发器 vhdl实验-Experimental report VHDL VHDL verilog rs flip-flop experiment experimental report VHDL VHDL verilog rs flip-flop experiment
- 2022-12-25 18:00:03下载
- 积分:1