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MIPS_LANG
verilog实现misp架构,并且支持modelsim仿真(Verilog implements MISP architecture and supports Modelsim simulation)
- 2020-06-18 04:40:02下载
- 积分:1
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ahb_verilog_design
代码为ahb interface ,用verilog编写的,包括仿真和综合。(Code for the interface AHB, written in Verilog, including simulation and synthesis.)
- 2020-12-21 14:49:07下载
- 积分:1
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altera公司cycloneII全系列说明书,实用
altera公司cycloneII全系列说明书,实用-altera" s cycloneII a full range of manual, practical
- 2022-02-04 11:53:16下载
- 积分:1
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RFID
RFID防碰撞算法的研究,以及对其各种算法的仿真,以及改进算法的仿真和比较。(RFID anti-collision algorithm, as well as its simulation algorithms, and improved simulation and comparison algorithms.)
- 2020-12-03 09:59:25下载
- 积分:1
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Xilinx,Altera,ARM,AVR,S52,Lattice等系列FPGA的下载线电路图和PCB
Xilinx,Altera,ARM,AVR,S52,Lattice等系列FPGA的下载线电路图和PCB-Xilinx, Altera, ARM, AVR, S52, Lattice series FPGA download cable circuit diagram and PCB
- 2022-03-17 00:48:42下载
- 积分:1
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一个模拟视频输入转VGA视频输出的Verilog程序,视频解码芯片采用ADV7181B,VGA DAC采用ADV7123,强力推荐...
一个模拟视频输入转VGA视频输出的Verilog程序,视频解码芯片采用ADV7181B,VGA DAC采用ADV7123,强力推荐-an analog video input to VGA video output Verilog procedures, Video decoder chip used ADV7181B, VGA DAC used ADV7123, strongly recommended!
- 2022-03-07 12:48:23下载
- 积分:1
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vmm_log
vmm log 验证平台,采用vmm搭建 (vmm log verification platform, built by vmm)
- 2011-04-30 20:02:06下载
- 积分:1
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自动打铃系统 附带时钟 定时打铃 整点打铃
自动打铃系统 附带时钟 定时打铃 整点打铃-Auto-play Ling System
- 2022-08-26 11:38:33下载
- 积分:1
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Viterberi 解码器
Viterberi 解码器使用 vhdl 编程实现将被用于制作增强功能
- 2023-03-06 21:00:04下载
- 积分:1
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用verilog语言实现的huffman编码源程序
本压缩包,包换一个用verilog语言实现的huffman编码源程序,同时给出了众多论文和基础知识的文档资料,一应俱全。(The compression package, shifting one using huffman coding verilog language source code, and gives basic knowledge of many papers and documentation, everything.)
- 2013-09-11 10:55:28下载
- 积分:1