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斯巴达3 Digilent演示：演示驱动perphrials在斯巴达3板的…
Spartan 3 Digilent Demo:This demo drives the perphrials on the Spartan 3 board. This drives a simple pattern to the VGA port, connects the switches to the LEDs, buttons to each anode of the seven segment decoder. The seven segment decoder has a simple counter running on it, and when SW0 is in the up position the seven segment decoder will display scan codes from the PS2 port. This demo how ever does not drive the RS-232 port or the memory. This is a simple design done entirely VHDL not microblaze.
- 2023-08-14 05:45:04下载
- 积分：1
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awgn511
关于5-11APSK在高斯信道中的误码率分析仿真程序，对具体调制方式及解码方式都有详细的过程(About 5-11APSK in Gaussian channel bit error rate analysis simulation program, has a detailed specific modulation and decoding process)
- 2013-03-31 21:56:28下载
- 积分：1
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agc_gen2
AGC(自动增益放大) Verilog代码 设计可以参考 第二部分(AGC (automatic gain control) can refer to the Verilog code design
)
- 2015-04-14 01:17:31下载
- 积分：1
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exercise3
用verilog实现dsp与Fpga接口的同步设计，其功能包括读写操作及四个功能模块，采用两个fifo实现不同时钟域的地址与数据的转换，在quartus ii11.0环境下运行，运行此程序之前需运行将调用fifo。(Dsp using verilog achieve synchronization with Fpga interface design, its features include read and write operations and four functional modules, using two different clock domains to achieve fifo address and data conversion in quartus ii11.0 environment to run, run this program required before running calls fifo.)
- 2013-08-30 11:12:09下载
- 积分：1
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TheResearchAndIPDesignOfSMBusBasedSmartBattery
本文研究了SMBus
规范，介绍了典型的基于片上系统（SoC）设计的知识产权核（IP）实现，采用自顶向下
(Top-down)的集成电路设计方法完成了设计，并架构了基于总线功能模型(BFM)的验证平台
完成功能仿真，顺利完成了逻辑综合和时序仿真。FPGA 验证和投片后测试均表明设计具有
良好的性能。(This paper studies the SMBus specification, based on the introduction of the typical system-on-chip (SoC) intellectual property core design (IP) implementation, using top-down (Top-down) of the integrated circuit design methods achieve a design and architecture based on the total Line functional model (BFM) achieve functional verification platform for simulation, successfully completed a logic synthesis and timing simulation. FPGA silicon validation and post-tests show that the design has good performance.)
- 2009-03-26 12:16:53下载
- 积分：1
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Masseffect-3---Jane-Shepard
超級好用
25M~100HZ的除頻器
寫了好久 超級實用
歡迎下載(Super easy to 25M ~ 100HZ of divider wrote a long time super practical welcome to download)
- 2013-09-13 13:33:13下载
- 积分：1
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SOUND_PLAY6
WM8731芯片的音效处理verilog代码，
WM8731芯片是音频ADCDAC芯片(WM8731 audio processing chip verilog code, WM8731 chip audio ADC DAC chip)
- 2013-12-14 14:12:10下载
- 积分：1
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Single-port-RAM-
单口RAM带CLR信号的verilog程序。很详细的.(Single-port RAM with a CLR signal)
- 2011-08-07 11:27:59下载
- 积分：1
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ISE7.1，采用VIRTEX
ISE7.1，采用VIRTEX-II芯片。实现adc数据采样，平均，通道选择，采样时钟选择，数据格式调整，内含fifo,uart等模块。-ISE7.1, using VIRTEX-II chip. Adc realize data sampling, on average, channel selection, the sampling clock select, adjust data formats, including fifo, uart modules.
- 2022-03-28 19:34:46下载
- 积分：1
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8051corelcd
fpga上实现的51内核，带有LCD试验，顺利试验成功很好用。(on fpga implementation of 51 core with LCD test, successfully tested well with the smooth.)
- 2014-03-30 14:35:20下载
- 积分：1
