登录
首页 » VHDL » Spartan 3E

Spartan 3E

于 2023-04-04 发布 文件大小:451.51 kB
0 94
下载积分: 2 下载次数: 1

代码说明:

这种设计将允许您调查是 1k 位保护与SHA-1 发动机内部 EEPROM 的达拉斯半导体 DS2432 装置。该装置具有一个有趣的 1 线界面,用来提供电力和双向的沟通。设计采用 PicoBlaze 来执行所有 1 有线通信协议和您通过 RS232 串行端口的 PC 上提供简单的用户界面 (使用超级终端或类似)。一些 DS2432 命令都完全支持的而其他人可以进行调查,使用简单的字节写入和读取字节的选项。

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • 完成的是RS422信号的计数功能,并产生一定的触发信号
    完成的是RS422信号的计数功能,并产生一定的触发信号-RS422 signals the completion of the count function, and produce a certain trigger signals
    2022-04-14 14:08:50下载
    积分:1
  • lm016液晶的VHDL代码
    应用背景这是lm016液晶的VHDL代码。lm016液晶显示器基本上由2行和2列组成。有2种类型接口,8)1位接口2)4位接口在这个包中给出了8位接口代码因为它很容易,但唯一的缺点是,它使用了更多的引脚数据和指令传输。关键技术此代码是 测试;FPGA开发板–xc6slx9-tqg144斯巴达6注意:液晶显示器引脚数字引脚47液晶使能引脚数字引脚50LCD RW引脚数字引脚48LCD D0引脚数字引脚51液晶D1引脚数字引脚55LCD D2引脚数字引脚56LCD D3引脚数字引脚57LCD D4引脚数字引脚58LCD D5引脚数字引脚59LCD D6引脚数字引脚61液晶D7引脚数字引脚62
    2022-03-13 00:00:48下载
    积分:1
  • 4
    Verilog的135个经典设计实例.使你工作使用学习中,会有很大帮助,各种典型案例(135 classic Verilog design examples. Make your work with the study, will be of great help, of various typical cases )
    2014-03-19 10:55:14下载
    积分:1
  • fir_digital
      本文对数字基带信号脉冲成型滤波的应用、原理及实现进行了研究。首先介绍了数字成型滤波的应用意义并分析了模拟和数字两种硬件实现方法,接着介绍了成形滤波器设计所需要MATLAB软件,以及利用ISE system generator在FPGA上进行滤波器实现的优势。文中给出了成形滤波函数的数学模型,讨论了几种常用成形滤波函数的传输特性以及对传输系统信号误码率的影响。然后介绍了本次设计中使用到的数字成形滤波器设计的几种FIR滤波器结构。把各种设计方案进行仿真,比较仿真结果,最后根据实际应用的情况并结合设计仿真中出现的问题进行分析,得出各种设计结构的优缺点以及适合应用的场合。(In this paper, the application of the principles and implementation of digital baseband signal pulse shaping filter is studied. First introduced the significance of digital shaping filter application and analysis of both analog and digital hardware implementation, then introduces the shaping filter design requires MATLAB software, and the use of ISE system generator on the FPGA to achieve the advantages of the filter. This paper presents a mathematical model of shaping filter function, the transmission characteristics discussed several common shaping filter functions and the impact on the error rate of the signal transmission system. Then introduced the use of this design to several digital shaping filter design FIR filter structure. The various design simulation, compare the simulation results, and finally according to the actual application and combine design simulation to analyze problems, come and where appropriate to the application advantages and disadvantages of various design s)
    2014-01-15 09:43:56下载
    积分:1
  • 数码管时钟
    利用8段数码管实现的秒表时钟,FPGA使用EP2C80208C8N,通过例化数码管控制模块、秒表计时模块、时钟进位模块等实现准确计时。
    2022-03-13 13:33:27下载
    积分:1
  • High Speed dd
    (Springer Series in Advanced Microelectronics 51) Ayan Palchaudhuri, Rajat Subhra Chakraborty (auth.)-High Performance Integer Arithmetic Circuit Design on FPGA_ Architecture, Implementation and Desig
    2020-06-24 08:40:01下载
    积分:1
  • procedures in the report, with QuartusII operations, the attention to word from...
    程序在报告中,要 用QuartusII运行,注意从word到运行环境中,可能有个别符号不兼容,重新在运行环境中输入那些符号就可以了-procedures in the report, with QuartusII operations, the attention to word from the operating environment, Some individual symbols are not compatible, the operating environment to re-enter those symbols on the
    2022-03-22 23:49:36下载
    积分:1
  • 0_09_uart_tx
    说明:  在FPGA板卡上面,通过单个按键实现串口的发送功能,带仿真需要自行修改一下工程配置(On the FPGA board, the sending function of the serial port is realized by a single key, and the engineering configuration needs to be modified by the simulation)
    2020-03-26 08:40:39下载
    积分:1
  • FPGA
    spwm dcac逆变 fpga与单片机一起作用(sdad)
    2010-08-12 18:20:08下载
    积分:1
  • dingshi
    定时器加数码管显示源码,以及test bench测试模块源码,经modelsim仿真结果正确(Timer plus digital display source code, and test bench test module source code, by modelsim simulation results are correct)
    2013-07-27 10:34:41下载
    积分:1
  • 696518资源总数
  • 106161会员总数
  • 5今日下载