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firhalfband
利用matlab提供的firhalfban函数设计阶数为16、通阻带容限为0.0001的半带滤波器。仿真测试滤波前后的信号时域图,回执滤波器的频率响应特性图(Provided firhalfban function using matlab design order of 16, through the 0.0001 stopband wool half-band filter. Simulation test filtered time domain signal before and after, receipt filter frequency response characteristic diagram)
- 2020-07-03 21:40:02下载
- 积分:1
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count16
制作16位流水灯,实现LED模块对于拨杆0和1的识别(Making 16-bit pipeline lamp to realize the recognition of dial rod 0 and 1 by LED module)
- 2020-06-24 01:20:02下载
- 积分:1
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UART模块
在FPGA上用Verilog实现的UART串口通信模块,包含分频模块,接收模块,发送模块,可以更改波特率,适合初学者学习,已经在板子上得到了验证。
- 2022-10-02 05:35:03下载
- 积分:1
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jisuanqishijianxianshi
基于FPGA编写一个时间显示,计数功能,年月显示的程序,(FPGA-based preparation of a time display, counting, years show program,)
- 2011-08-30 16:00:48下载
- 积分:1
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以太网MII接口程序
在以太网通信中,连接MAC与物理层需要使用MII接口,此程序提供了MII接口的详细设计。
- 2022-03-26 09:45:46下载
- 积分:1
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fft_16
16点FFT,简单易理解,适合初学者了解(16 point FFT, simple and easy to understand, suitable for beginners to understand)
- 2018-05-07 16:20:10下载
- 积分:1
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ADAPTIVEFILTER
采用vhdl代码描述自适应滤波器,具有很好的可参考性,和实用性(Vhdl code to describe the use of adaptive filter, can be found with a good nature and usefulness of)
- 2010-02-05 23:37:48下载
- 积分:1
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周立公Verilog
关于verilog的知识点和关键点的总结(Summary of knowledge points and key points of Verilog)
- 2020-07-01 22:20:02下载
- 积分:1
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Array-multiplier
Array muiltiplier verilog code.. 4 bit two inputs with 8 bit outputs
- 2015-02-21 12:59:12下载
- 积分:1
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gmii_tx_mac
实现千兆以太网数据发送,通过GMII接口向PHY写数据,控制PHY发送数据。(Implementation of Gigabit Ethernet data transmission, write data to the PHY through the GMII interface, control PHY data.)
- 2013-08-08 15:24:43下载
- 积分:1