-
Verilog HDL数字设计与综合 夏宇闻译（第二版）
电子书籍 verilog HDL 数字设计与综合 夏宇闻所编写(electronic text
Foreign electronic and communication textbooks)
- 2021-01-15 15:18:45下载
- 积分：1
-
双电梯控制器
说明： 使用verilog实现的双电梯控制器，1-9层，仿真通过(a bi-elevator controller written in VerilgHDL, which has floor1-9, simulation passed)
- 2020-06-17 11:44:27下载
- 积分：1
-
VHDL编程语言设计，显示灯，显示VHDL字样。
VHDL编程语言设计，显示灯，显示VHDL字样。-VHDL programming language design, indicator lights, indicating the word VHDL.
- 2022-06-28 14:26:29下载
- 积分：1
-
ytupn
Very suitable for the study using computer vision, Analysis of the signal time domain, frequency domain, cepstrum, cyclic spectrum, etc. The performance of the program has reached a high level.
- 2017-09-02 18:07:13下载
- 积分：1
-
xds100v3r2.0
TI DSP XDS100V3仿真器原理图Rev2.0(TI DSP XDS100V3 schematic Rev2.0)
- 2013-01-27 00:44:06下载
- 积分：1
-
fpuvhdl_latest.tar
浮点数运算的FPGA实现，包括仿真文件。(FPGA realization of floating-point operations, including the simulation file)
- 2009-09-05 11:20:12下载
- 积分：1
-
ofdm
这是OFDM调制matlab的程序，中间详细描述了调制的过程，希望对大家有用。(This is the OFDM modulation matlab procedures, a detailed description of the intermediate modulation process, I hope useful.)
- 2013-09-26 16:20:42下载
- 积分：1
-
This document is formatted UltraEdit document describes some of the original Ult...
这个文件中是UltraEdit的一些格式化文件说明
由于原来的 UltraEdit 不支持 HDL 语言的格式化显示，把文件解压得到的 wordfile.txt替换其安装目录下的 wordfile.txt 文件即可-This document is formatted UltraEdit document describes some of the original UltraEdit as a result of HDL does not support formatting language shows that the document received decompression wordfile.txt replace its installation directory under the document can wordfile.txt
- 2022-09-16 02:20:04下载
- 积分：1
-
C54x is the Verilog code opencoreip
c54x的VeriLog程序代码
也是opencoreip-C54x is the Verilog code opencoreip
- 2022-03-26 18:08:34下载
- 积分：1
-
ap01
一個紅外線感測電路的設計，是經由opa來設計。(An infrared sensing circuit design, is designed by opa.)
- 2011-10-19 14:22:24下载
- 积分：1
