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latticeECP3-serdes-test-code
lattice ECP3系列高速FPGA serdes测试代码(lattice ECP3 series high speed serdes test code)
- 2021-03-25 01:39:14下载
- 积分：1
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GetCPU
动态获取CPU使用率源码 可以加到压力测试里(Dynamic access to CPU use the source code
)
- 2014-06-28 18:56:23下载
- 积分：1
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第七次课--视频图像DCT处理及水印嵌入
熟悉IIC协议总线协议，采用IIC总线对图像采集传感器寄存器进行配置，并转换为RGB565格式。
利用异步FIFO完成从摄像头输出端到SDRAM 和SDRAM 到VGA 接口各跨时钟域信号的传输和处理。
利用 SDRAM 接口模块的设计，实现了刷新、读写等操作；为提高SDRAM 的读写带宽，均采用突发连续读写数据方式；并采用乒乓操作实现 CMOS 摄像头与VGA的帧率匹配。
利用双线性插值方法实现对图像640×480到1024×768的放大操作。
完成VGA显示接口设计。(Familiar with IIC protocol bus protocol, IIC bus is used to configure the register of image acquisition sensor and convert it into RGB565 format.
Asynchronous FIFO is used to transmit and process signals across clock domain from camera output to SDRAM and SDRAM to VGA interface.
With the design of SDRAM interface module, refresh, read and write operations are realized. In order to improve the read and write bandwidth of SDRAM, burst continuous read and write data mode is adopted, and table tennis operation is used to achieve frame rate matching between CMOS camera and VGA.
The bilinear interpolation method is used to enlarge the image from 640*480 to 1024*768.
Complete the VGA display interface design.)
- 2020-06-25 04:00:02下载
- 积分：1
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CPU-Verilog
简单流水线CPU，使用 verilog实现，实现一条指令的整个流程(Implementation of Simple Pipeline CPU Verilog)
- 2020-06-23 19:40:01下载
- 积分：1
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Static RAM is a tube composed of MOS flip
静态RAM是由MOS管组成的触发器电路，每个触发器可以存放1位信息。只要不掉电，所储存的信息就不会丢失。因此，静态RAM工作稳定，不要外加刷新新电路，使用方便。但一般SRAM的每一个触发器是由6个晶体管组成，SRAM芯片的集成度不会太高，目前较常用的有6116（2K×8位），6264（8K×8位）和62256（32K×8位）。6264RAM有8192个存储单元，每个单元为8位字长。-Static RAM is a tube composed of MOS flip-flop circuit, each flip-flop can store one message. Long as it does not brown-out, the stored information will not be lost. Therefore, the static stability in the work RAM, do not refresh plus the new circuit and easy to use. But generally each SRAM trigger is composed of six transistors, SRAM chip integration will not be too high, there are currently more commonly used 6116 (2K × 8 bit), 6264 (8K × 8 bit) and 62256 (32K × 8 bits). 6264RAM have 8192 storage units, each for 8-bit word length.
- 2022-04-10 07:00:36下载
- 积分：1
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zuoye2
主要编写了一组二进制数据通过根升余弦滤波器后的波形，但并没有使用ISE内部的FIR滤波器内核，该程序相当于编写了一个根升余弦滤波器。(Mainly prepared a set of binary data through the root raised cosine filter waveform after, but did not use the ISE internal FIR filter kernel, the program is equivalent to the preparation of a root raised cosine filter.)
- 2013-09-18 15:24:13下载
- 积分：1
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利用fpga实现的DDS，可输出正弦波，输出频率可调
利用fpga实现的DDS，可输出正弦波，输出频率可调-FPGA realization of the use of DDS, sine wave output, output frequency adjustable
- 2022-01-28 18:28:31下载
- 积分：1
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manuals
ISE Design Suite Software Manuals and
Help - PDF Collection,ISE 软件手册以及帮助。(ISE Design Suite Software Manuals and Help- PDF Collection, ISE software manuals as well as help.)
- 2012-11-28 21:47:01下载
- 积分：1
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FPGA读写SDRAM的实例
FPGA对SDRAM进行读写测试程序，亲测有效无误。(FPGA reads and writes test programs for SDRAM.)
- 2017-09-18 14:51:53下载
- 积分：1
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yangxiaoniu
杨小牛大神的软件无线电，做信道化或者宽带数字接收机的可以下载(Software Radio written by XiaoNiu Yang,people who deal with channelization or wideband digital receiver can download)
- 2016-08-26 16:20:21下载
- 积分：1
