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王金明：《Verilog HDL 程序设计教程》程序
王金明：《Verilog HDL 程序设计教程》程序-Wang Jinming:
- 2023-04-09 20:15:03下载
- 积分：1
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PID_Verilog
说明： 之前一直找不到自学编写了一个，PID案例，分享下(I have been unable to find a self-taught, compiled a PID case, share under)
- 2020-10-08 13:26:54下载
- 积分：1
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RS-code
说明： 我测试过的！Verilog HDL实现RS编码。(I' ve tested it! RS coding Verilog HDL implementation.)
- 2010-04-12 20:30:36下载
- 积分：1
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一种使用modelsim6简单的解码程序
A program for a simple decoder using ModelSim6
- 2022-02-06 04:44:14下载
- 积分：1
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VGA_test
说明： 基于FPGA设计的一段测试VGA接口的VHDL小程序\功能为在显示器上间隔显示横条、竖条以及棋盘格等彩条信号，希望对初学FPGA驱动VGA接口的电子爱好者有用(FPGA-based design of a VGA interface VHDL test applet \ functions for the intervals shown in the display bar, vertical bars and checkerboard patterns and other signals of color, hope for beginners FPGA VGA interface driver useful for electronic enthusiasts)
- 2010-04-06 11:26:58下载
- 积分：1
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Modulator70
个人参与的某国家工程并行排序MATLAB程序，用于FPGA的RTLAB仿真，使用Simulink工具生成HDL代码。测试可用。(Individuals involved in sort of a national engineering parallel MATLAB programs for the FPGA RTLAB simulation, using the Simulink tool to generate HDL code. Test available.)
- 2011-07-29 15:16:30下载
- 积分：1
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7SegmenAngka
说明： asssembly ccode to turn on 7 segmen
- 2019-12-17 09:53:09下载
- 积分：1
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electric-8.08
The ElectricTM VLSI Design System is an open-source Electronic Design Automation (EDA) system that can handle many forms of circuit design, including:
* Custom IC layout
* Schematic Capture (digital and analog)
* Textual Languages such as VHDL and Verilog
(The ElectricTM VLSI Design System is an open-source Electronic Design Automation (EDA) system that can handle many forms of circuit design, including:* Custom IC layout* Schematic Capture (digital and analog)* Textual Languages such as VHDL and Verilog)
- 2009-01-09 20:01:17下载
- 积分：1
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简易cpu的设计
计算机组成原理的课程设计作业，用vhdl语言写了一个简易的cpu，包括寄存器，存储器等原件，完全用代码写成，没有直接用原件去连接，有助于我们很好的学习vhdl。 这是一个cpu的连接代码，并没有各种原件的代码 ，因为各个原件代码很简单就没上传
- 2022-03-12 07:35:18下载
- 积分：1
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ddr3_sun
使用DDR3IP核进行仿真，写入读取数据(Using DDR3IP core to simulate, write and read data)
- 2021-01-07 00:48:53下载
- 积分：1
