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crc16_8
modbus通讯必须的校验码生成器，可以直接使用(modbus crc16/8 free use)
- 2020-10-22 10:47:23下载
- 积分：1
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verilog.HDL.examples
许多非常有用的 Verilog 实例: ADC, FIFO, ADDER, MULTIPLIER 等(many very useful Verilog examples : ADC, FIFO, ADDER, MULTIPLIER etc.)
- 2020-06-26 04:40:02下载
- 积分：1
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DE2 SOPC LCM
DE2 S O P C 用硬件语言 描述地 开发板上测试 CLM模块 实现视频传输-DE2 SOPC LCM
- 2022-07-01 11:31:51下载
- 积分：1
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fir在dspbuilder下产生VHDL源码及其测试激励文件时的matlab模型,在modelsim下仿真通过...
fir在dspbuilder下产生VHDL源码及其测试激励文件时的matlab模型,在modelsim下仿真通过-fir in dspbuilder VHDL source code under test and document the incentive mat lab model, the simulation under through modelsim
- 2023-07-19 00:45:03下载
- 积分：1
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DCT
用verilog语言实现DCT编解码
附有DCT的说明(Using Verilog language realize DCT codec with a description of DCT)
- 2020-11-14 15:19:41下载
- 积分：1
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3M
说明： 在FPGA实验操作系统实现ASK,FSK,PSK的调制解调，基带信号由M序列发生器产生，经过AD模块在示波器上进行显示，精油DA模块在同一块实验板上进行解调操作，生成信号控制LED灯的亮灭，并与调制输出信号在示波器上同时展示，并进行对比。基带信号为3MHz。(In the FPGA operating system experiment implementation ASK, FSK, PSK modulation and demodulation of the baseband signal generated by the M sequence generator, through the AD module on the oscilloscope display module, oil DA demodulation operation in the same block experiment board, the signal generation control LED lights off, and the modulated output signal displayed on the oscilloscope at the same time, and compared.)
- 2018-02-09 20:07:01下载
- 积分：1
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eluosi_game
使用Quartus II 9.1完成俄罗斯方块游戏，只要使用有VGA和键盘接口的FPGA开发板就行实现。操作简单，使用的是VHDL和Verilog语言(Use the Quartus II 9.1 to complete the tetris game, as long as you use a VGA and keyboard interface implementation of FPGA development board. The operation is simple, the use of VHDL and the Verilog language)
- 2020-11-06 12:49:49下载
- 积分：1
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master_slave
AXI4-Lite总线的主从机读写，例程及代码(AXI4-Lite Bus Host-Slave Read-Write, Routine and Code)
- 2019-03-22 22:24:20下载
- 积分：1
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ISARCSSim_dr
基于CS的一维距离像（HRRP）及FFT成像对比(CS-based HRRP and FFT HRRP)
- 2021-01-13 19:58:49下载
- 积分：1
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Dual-Mode-Dual-Band-Filters
本文介绍一种波导双模双带滤波器的设计方法。(This paper presents a new class of dual-mode dualband
filters in which each polarization is dedicated to a selected
band. The equivalent circuit is a parallel combination of two inline
networks that represent each polarization. A transmission zero is
generated between the two bands by properly adjusting the relative
orientations of the input and output coupling apertures.)
- 2013-03-12 18:08:33下载
- 积分：1
