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lgpl RS编解码
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lgpl RS编解码
5-6 Reed-Solomon Codes-LGPL RS codec 5-6 Reed-Solomon Codes
- 2022-02-01 10:13:23下载
- 积分:1
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zuse
验证阻塞赋值与非阻塞的赋值赋值过程的先后顺序(Verification of the order of assignment and non blocking assignment)
- 2017-12-18 17:04:23下载
- 积分:1
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ModelSim waveform can be compared to the current functional simulation with a re...
ModelSim的波形比较的功能可以将当前仿真与一个参考数据(WLF文件)进行比较,比较的结果可以在波形窗口或者列表窗口中查看,也可以将比较的结果生成一个文本文件-ModelSim waveform can be compared to the current functional simulation with a reference (WLF paper ), the results can be compared in the waveform window or window List View, it will also compare the results generate a text file
- 2023-05-21 00:20:02下载
- 积分:1
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3P3_wimdow
图像插值算法,窗口为3*3,用于图像的除去死点,以及提高清晰度或者使图像柔和(3*3 window)
- 2012-02-28 15:36:02下载
- 积分:1
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edc_spi_command
单片机和FPGA的通信程序,发送5个数,传输稳定,可以自行修改可一次传多个数(MCU and FPGA communication program, send five the number of stable transmission, you can modify the number may be more than one pass)
- 2013-09-14 21:09:52下载
- 积分:1
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看门狗定时器
使用IEEE.STD_LOGIC_1164.ALL; - 取消对以下库声明,如果用符号或无符号值using--算术功能 - 使用IEEE.NUMERIC_STD.ALL; - 取消对以下库声明如果instantiating--任何Xilinx基元在这代码.--库UNISIM; - 使用UNISIM.VComponents.all;实体看门狗端口(SYSRST:在STD_LOGIC; SYSCLK:在STD_LOGIC; WR:在STD_LOGIC; DATAIN:在STD_LOGIC_VECTOR(7 DOWNTO0); RESETOUT:出STD_LOGIC; debugStates:出STD_LOGIC_VECTOR(1 DOWNTO0); debugDivider:出STD_LOGIC; debugFlag:出STD_LOGIC);年底看门狗,看门狗建筑行为issignal timeoutSelect:STD_LOGIC_VECTOR(1 DOWNTO0);信号timerRestart:STD_LOGIC;信号timerEnable:STD_LOGIC;组件wdtcntl端口(调试:出STD_LOGIC_VECTOR(1 DOWNTO0);系统时钟:在STD_LOGIC; SYSRST:在STD_LOGIC; WR:在STD_LOGIC; DATAIN:在STD_LOGIC_VECTOR(7 DOWNTO0);重新启动:从STD_LOGIC; timerEnb:出STD_LOGIC; timerSel:出STD_LOGIC_VECTOR(1 DOWNTO0));最终组件;组件wdt_timer端口(dbDivider:出STD_LOGIC; DBFLAG:出STD_LOGIC; SYSRST:在STD_LOGIC; SYSCLK:在STD_LOGIC;启用:在STD_LOGIC;重启:在STD_LOGIC; RESETOUT:出STD_LOGIC; timeoutSel:在STD_LOGIC_VECTOR(1 DOWNTO0 ));结束部分; begincontroller:wdtcntl端口映射(debugStates,系统时钟,SYSRST,WR,DATAIN,timerRestart,timer
- 2022-06-14 18:46:27下载
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the booth algorithm to implement the 32bit 's multiplication.
the booth algorithm to implement the 32bits multiplication.-the booth algorithm to implement the 32bit "s multiplication.
- 2022-10-16 05:40:03下载
- 积分:1
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lcd1602
艾米电子的液晶1602的Verilog语言程序
(Amy e-LCD 1602 of the Verilog language program)
- 2010-10-26 11:20:49下载
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二进制除法器,采用移位相减的方法实现,位数可调
二进制除法器,采用移位相减的方法实现,位数可调-The source code of a divider
- 2023-08-14 00:00:02下载
- 积分:1
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EDA应用中RAM具体定义实例,供大家学习和写程序参考之用
EDA应用中RAM具体定义实例,供大家学习和写程序参考之用-EDA applications, examples of the specific definition of RAM, for everyone to learn and write programs for reference
- 2022-08-18 02:44:17下载
- 积分:1