-
AD5791_spi
该代码为VHDL语言描述的AD579 SPI通讯程序,包括一些代码注解。(Thisis a SPI communication promgram of AD5791 designed with VHDL which compared with some discreption.)
- 2021-04-20 14:28:50下载
- 积分:1
-
uart(可综合)
说明: 【实例简介】用Verilog实现uart串口协议,波特率可选9600、19200、38400、115200。8位数据为,1位校验位,1位停止位。
【实例截图】
【核心代码】核心代码包括TX,RX,Baud,FIFO([example introduction] UART serial port protocol is implemented with Verilog, and the baud rate can be 9600, 19200, 38400, 115200. 8-bit data, 1 bit check bit, 1 stop bit.
[example screenshot]
[core code] the core code includes TX, Rx, baud and FIFO)
- 2020-12-08 16:00:16下载
- 积分:1
-
CAN总线开发代码 can-sja1000
CAN总线开发代码,FPGA与sja1000通信,可实现CAN的接收和发送。(The FPGA and the sja1000 CAN bus development code, communication, which CAN realize the CAN send and receive.)
- 2021-04-14 17:08:55下载
- 积分:1
-
12864hanzixianshi
基于FPGA 的12864液晶显示汉字,用verilog编写的。(12864 liquid crystal display Chinese characters based on FPGA, written in verilog.)
- 2021-04-27 15:48:44下载
- 积分:1
-
build a music player with nios 2
build a music player with nios 2
- 2023-01-23 06:00:03下载
- 积分:1
-
cic_dec_8_three
CIC 文件的VHDL
cic_dec_8_three
CIC 文件的VHDL-cic_dec_8_threeCIC documents VHDL
- 2023-03-30 12:50:03下载
- 积分:1
-
4. If a modified source code is distributed, the original unmodified
4. If a modified source code is distributed, the original unmodified -- source code must also be included (or a link to the Free IP web -- site). In the modified source code there must be clear -- identification of the modified version.-4. If a modified source code is distributed, the original unmodified-- source code must also be included (or a link to the Free IP web-- site). In the modified source code there must be clear-- identification of the modified version.
- 2022-01-21 00:25:44下载
- 积分:1
-
数控分频器的输出信号频率为输入数据的函数。用传统的方法设计,其设计过程和电路都比较复杂,且设计成
果的可修改性和可移植性都较差。基于VHDL 的数控分频器设...
数控分频器的输出信号频率为输入数据的函数。用传统的方法设计,其设计过程和电路都比较复杂,且设计成
果的可修改性和可移植性都较差。基于VHDL 的数控分频器设计,整个过程简单、快捷,极易修改,可移植性强。他可利用
并行预置数的加法计数器和减法计数器实现。广泛应用于电子仪器、乐器等数字电子系统中。-NC divider output signal frequency is a function of input data. Using traditional methods of design, process and circuit design are complex and can modify the design of the results are poor and portability. NC VHDL divider based on the design, the whole process simple, fast, easy to modify, strong portability. He can use preset number of parallel addition and subtraction counter counter to achieve. Widely used in electronic equipment, musical instruments and other digital electronic systems.
- 2023-08-29 11:30:03下载
- 积分:1
-
在 2 线液晶电视 DISPLAY(KHỞI TẠO HIỂN THỊ LCD HIỂN THỊ 2 HÀNG) CODE_VHDL_INITIALIZING
- 2022-08-23 23:23:25下载
- 积分:1
-
vgav2
This verilog vga test circuit
- 2012-08-09 08:10:09下载
- 积分:1