-
无线发射模块的 SRRC 成型匹配滤波设计 Verilog 代码
无线发射模块的 SRRC 成型匹配滤波设计 Verilog 代码，包含了所有测试，主模块，可以用在基带调制端，滤波器的滚降系数0.10～0.25，如果那些没有做过这方面的朋友，可以看看实现，和方法，提供一个参考和帮助
- 2022-11-23 08:55:03下载
- 积分：1
-
5L_SVPWM_ANPC_CPLD
基于CPLD硬件描述语言编写的五电平SVPWM脉冲触发程序(Five level SVPWM pulse trigger program based on CPLD hardware description language)
- 2020-12-14 16:19:15下载
- 积分：1
-
等精度频率计
基于FPGA的等精度频率计，包括工程，doc和一些查找资料(An equal precision frequency meter based on FPGA, including engineering, Doc, and some lookup data)
- 2020-10-30 21:39:57下载
- 积分：1
-
13_usb_test
利用FPGA硬件编程语言Verilog实现USB通信开发(Realization of USB communication development by using FPGA hardware programming language Verilog)
- 2018-08-09 10:08:00下载
- 积分：1
-
RS_Encoder
具有16个校验位的RS编码器，在FPGA上实现。(With 16 RS encoder, the parity bit in the FPGA.)
- 2012-08-06 11:52:37下载
- 积分：1
-
ml505_mig_design
Xilinx开发板ML505的DDRII示例程序，使用Verilog，调用MIG，编译环境ISE11.1(Xilinx ML505 development board of DDRII sample program, using Verilog, called MIG, build environment ISE11.1)
- 2010-05-13 02:39:04下载
- 积分：1
-
Single-CPU
说明： 简单的单周期CPU设计，实现的指令有：算术运算指令、逻辑运算指令、移位指令、比较指令、存储器读/写指令、分支指令、跳转指令、停机指令。(Simple single-cycle CPU design,The instructions implemented are as follows:Arithmetic operation instruction, logical operation instruction, shift instruction, comparison instruction, memory read/write instruction, branch instruction, jump instruction, stop instruction.)
- 2020-06-16 12:28:32下载
- 积分：1
-
Aluno
Example of programming fifo in c
- 2013-01-17 00:23:28下载
- 积分：1
-
OFDm full code
veriog code for fodm.It includes transmitter and receiver.
Transmitter part has serial in parallel out, decoder, interleaver, IFFT and finally to the transmitter block.
Receiver part has the reverse order to transmitter.
- 2023-02-08 10:40:03下载
- 积分：1
-
smartWasher
QUARTER编程环境实现的智能洗衣机系统，通过DE0板子进行模拟，组要完成洗衣机5个步骤的顺序过程以及系统相应动作(QUARTER programming environment of intelligent washing system, through simulation DE0 board, groups 5 to complete the washing process and the system the sequence of steps corresponding action)
- 2020-11-06 13:19:49下载
- 积分：1
