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Huffman
用VHDL编写的huffman编码的源程序(With the VHDL source code written in huffman coding)
- 2010-06-08 14:58:32下载
- 积分：1
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FPGA_OV5640_VGA_DDR3_code
说明： 基于OV5640摄像头的视频图像传输存储以及读取。供大家参考。(Video image transmission, storage and reading based on ov5640 camera. For your reference.)
- 2021-03-06 15:39:30下载
- 积分：1
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usbFPGAconnect
该例程是PC机通过FX2-CY7C68013-A的USB2.0控制芯片与FPGA实现通信。其中的工程和代码包括PC机上的USB固件程序、驱动程序、上位机程序，FPGA上的VERILOG通信程序。(The routine is a PC, through the FX2-CY7C68013-A of the USB2.0 controller chip and the FPGA to achieve communication. One of the projects and code, including PC, the USB firmware, drivers, FPGA' s Communication Program)
- 2021-04-08 15:19:00下载
- 积分：1
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ddr2_controller
A controller for DDR2 on FPGA with vhdl, content testbench, model and textfile-generation/data-detection using python.
- 2015-11-16 00:31:22下载
- 积分：1
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使用 verilog 的低通滤波器设计
低通滤波器用于的加强频率选择方案中的任何信号，所以这段代码将帮助他们选择他们各自设计的频率到一个特殊频率为界
- 2022-06-12 07:15:55下载
- 积分：1
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SD卡读取图片显示例程
基于verilog的SD卡读取图片显示例程的实验
基于verilog的SD卡读取图片显示例程的实验
基于verilog的SD卡读取图片显示例程的实验
基于verilog的SD卡读取图片显示例程的实验
基于verilog的SD卡读取图片显示例程的实验
- 2022-03-21 20:22:44下载
- 积分：1
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CNT4
说明： 4位二进制加法计数器的两种不同VHDL的描述,与比较。(4-bit binary addition of two different counter VHDL description, and more.)
- 2010-04-13 22:20:44下载
- 积分：1
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RSA的VHDL代码
Here, we present the first available open-source 512 bit RSA core. This is an early
prototype version of a full FIPS Certified 512-4096 capable RSA Crypto-core which will be on sale
soon. The version provided, has not the same performance than the final product since it was a
proof of concept that we decided to release to the community in order to help small projects which
need RSA ciphering.
- 2022-09-07 05:20:03下载
- 积分：1
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一个UART协议验证
一个 ；通用异步接收器/发送器UART，简称 ； ；/ˈ居ːɑːRT /，是 ；计算机硬件 ；设备之间的数据并行转换 ； ；和 ；serialfo
- 2022-04-10 03:32:48下载
- 积分：1
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c_xapp260
xilinx应用指南xapp260的中文翻译版本。利用 Xilinx FPGA 和存储器接口生成器简化存储器接口。本白皮书讨论各种存储器接口控制器设计所面临的挑战和 Xilinx 的解决方案，同时也说明如何使用 Xilinx软件工具和经过硬件验证的参考设计来为您自己的应用（从低成本的 DDR SDRAM 应用到像 667 Mb/sDDR2 SDRAM 这样的更高性能接口）设计完整的存储器接口解决方案。(The use of Xilinx FPGA and Memory Interface Generator to simplify memory interface. This white paper discusses the various memory interface controller design challenges facing
Warfare and Xilinx solutions, but also explains how to use Xilinx
Software tools and hardware-proven reference designs to be for your own
With (from low-cost DDR SDRAM applications to such as 667 Mb/s
This higher performance DDR2 SDRAM interface) design a complete deposit
Storage device interface solution.)
- 2009-11-03 10:01:20下载
- 积分：1
