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EEPROM_RD_WR
本程序包含：EEPROM的功能模型(eeprom.v)、读/写EEPROM的verilog HDL 行为模块（eeprom_wr.v）、信号产生模块（signal.v）和顶层模块(top.v) ，这样可以有一个完整的EEPROM的控制模块和测试文件，本文件通过测试。(This procedure includes: EEPROM of the functional model (eeprom.v), read/write EEPROM acts of verilog HDL modules (eeprom_wr.v), signal generator module (signal.v) and top-level module (top.v), this can have a EEPROM complete control module and test document, this document is to pass the test.)
- 2008-12-23 15:04:20下载
- 积分：1
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vga
vga，显示彩条，及其简单易懂，适合初学(vga, display color bars, and its easy-to-understand, suitable for beginners)
- 2012-10-10 21:10:15下载
- 积分：1
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xilinx-FPGA
xilinx FPGA技术详解,从设计流程到设计注意点(xilinx FPGA technology Detailed Design points, from the design process to)
- 2012-08-10 13:07:41下载
- 积分：1
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xilinx zc706开发板Verilog流水灯源代码
xilinx zc706开发板Verilog流水灯源代码，适合刚开始接触FPGA的程序员，新接触xilinx ZYNQ-7000 zc706套件开发板的菜鸟，资源包含设计程序，仿真程序、综合程序，很简单的代码，适合初学者
- 2022-02-10 00:22:30下载
- 积分：1
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N-bits-by-M-bits
这是一个verilog代码实现的常用乘法器。设计的是通用N比特乘M比特的二进制乘法器(This is a common multiplier verilog code. Design of a generic N bits by M bits of the binary multiplier)
- 2013-10-05 19:44:52下载
- 积分：1
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FPGAshixu
FPGA经验总结：时序是设计出来的
我们在做详细设计的时候，对于一些信号的时序肯定会做一些调整的，但是这种时序的调整最多只能波及到本一级模块，而不能影响到整个设计。(FPGA Experience: Timing is designed to do the detailed design of our time, for some signal timing will certainly make some adjustments, but adjust this timing can only spread to up to this level of the module, but not affect the whole design.)
- 2015-03-13 10:27:51下载
- 积分：1
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SMBus
SMbus通讯协议的Verilog程序段，已通过Moldesim的仿真，可用(Verilog program segment of the SMbus communication protocol, has been through the Moldesim simulation, the available)
- 2021-03-24 18:29:15下载
- 积分：1
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五子棋verilog
资源描述五子棋verilog五子棋verilog五子棋verilog五子棋verilog五子棋verilog五子棋verilog五子棋verilog五子棋verilog五子棋verilog五子棋verilog五子棋verilog五子棋verilog五子棋verilog五子棋verilog
- 2022-04-08 19:23:01下载
- 积分：1
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sig_detect
使用信号功率计算，检测信号是否到达。从而控制后续模块，以减小系统功耗。(Signal power calculation, the detection signal to reach. To control follow-up modules to reduce system power consumption.)
- 2012-08-08 15:30:13下载
- 积分：1
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AD转换
FPGA为altera的EP4CE10F17C8,AD芯片为TLC519，验证成功，可以进行小电压数模转换
- 2022-07-27 18:29:40下载
- 积分：1
