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mimo_dectection
mimo检测算法的FPGA实现，包括最小迫零检测算法和ML检测算法，已在ISE上仿真通过
(mimo detection algorithm for FPGA implementation, including the smallest zero forcing detection algorithm and ML detection algorithm has been simulated by ISE on)
- 2021-02-15 12:09:48下载
- 积分：1
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FIFO
FIFO的VERILOG代码编写
可综合的Verilog FIFO存储器(The VERILOG code FIFO write comprehensive Verilog FIFO memory)
- 2010-10-11 20:35:47下载
- 积分：1
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用VHDL实现的DDS逻辑，大家可以参考下
用VHDL实现的DDS逻辑，大家可以参考下-DDS achieved using VHDL logic, we can refer to the following
- 2022-08-10 09:43:58下载
- 积分：1
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UART(RS232)
用VERILOG语言实现的通用异步串行收发器（RS232收发器），波特率可设置，通讯稳定，已成功应用于实际项目。(VERILOG language with universal asynchronous serial transceivers (RS232 transceiver), the baud rate can be set, communication stability, has been successfully applied in actual projects.)
- 2021-04-01 10:59:08下载
- 积分：1
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20190717
uart documentation, july 17, 2019. the document describes the basics of verilog programming and how to implement them on an fpga device
- 2020-06-21 21:40:01下载
- 积分：1
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Study_Test
说明： 实现简单的硬件加法器、除法器，实现源码文中注释(Realize simple hardware adder and divider, realize source code)
- 2020-06-21 05:20:01下载
- 积分：1
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设计并制作一个14键单音电子琴预先存入一些曲谱电路在4Hz的时钟控制下自动播放
通过220V电源适配器给电路提供工作电源...
设计并制作一个14键单音电子琴预先存入一些曲谱电路在4Hz的时钟控制下自动播放
通过220V电源适配器给电路提供工作电源-Design and production of a 14-key electric piano tone into a number of music scores advance in 4Hz clock circuit under the control of automatic play through 220V power adapter to provide power to the circuit
- 2022-02-12 16:37:51下载
- 积分：1
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scia_loopback_interrupts
TI F28027 SCI 源码，中断，FIFO，LoopBack使能(TI F28027 SCI source code, interrupt, FIFO and Loopback enalbe)
- 2020-11-18 15:29:40下载
- 积分：1
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FPGA的设计流程手册
FPGA设计流程指南
介绍基本的设计方法-FPGA Design Process Manual
- 2022-08-14 04:24:11下载
- 积分：1
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UART
说明： 使用FPGA的FIFO，状态机，乒乓操作等实现了异步UART。(The use of FPGA-FIFO, state machine, ping-pong operation to achieve the asynchronous UART.)
- 2008-10-09 15:59:20下载
- 积分：1
