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Verilog_HDLjiaocheng
Verilog HDL教程
什么是Verilog HDL？
Verilog HDL 硬件描述语言(What is a Verilog HDL tutorials Verilog HDL? Verilog HDL hardware description language)
- 2009-06-15 21:44:11下载
- 积分：1
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c_fir_ppt
C语言写得FIR滤波器代码，简单实用，是学习滤波器设计的好材料，附带PPT滤波器设计说明(C language written FIR filter code, simple and practical, is a good learning materials of filter design, with PPT filter design
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- 2020-07-04 03:00:02下载
- 积分：1
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add_noisem
把指定的噪声叠加到信号上去.有标准噪声库NOISEX-92，其中带有白噪声、办公室噪声、工厂噪声、汽车噪声、坦克噪声等等，在信号处理中往往需要把库中的噪声叠加到信号中去，而噪声的采样频率与纯信号的采样频率往往不一致，需要采样频率的校准。
(The specified noise superimposed to the signal up. Standard noise library NOISEX-92, with white noise, office noise, factory noise, car noise, tank noise in the signal processing often requires noise to be superimposed in the library The signal to noise of the sampling frequency and pure signal sampling frequency is often inconsistent sampling frequency of calibration.)
- 2012-08-10 14:18:33下载
- 积分：1
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Tempe_deteV2.1
说明： FPGA接收串口UART发来的指令设定温度报警值，实时采集DS18B20温度传感器并显示，带报警功能(FPGA receives the instruction from UART, sets the temperature alarm value, collects and displays DS18B20 temperature sensor in real time, with alarm function)
- 2021-04-13 13:28:56下载
- 积分：1
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vhdl
说明： 学习VHDL可以用得上，有很多实例，可以对照着自己写一些东西(VHDL can be useful to learn, there are many examples, can be done to write something)
- 2008-10-31 20:59:04下载
- 积分：1
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mult3
this is the multiplier 3 module for the reed solomon encoder
- 2009-03-23 17:22:55下载
- 积分：1
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rs coding vvhdl I do not want to be able to know the specific useful whether you...
rs编码vvhdl 希望能通过 我不晓得具体对大家有用否 希望懂rs编码的多多交流
-rs coding vvhdl I do not want to be able to know the specific useful whether you want to understand a lot of coding rs exchange
- 2022-11-11 05:40:03下载
- 积分：1
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A VHDL source code for testing the digits and the switches on a spartan 3 basys...
A VHDL source code for testing the digits and the switches on a spartan 3 basys board
- 2023-06-18 08:35:04下载
- 积分：1
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hdb3_v3
Quartus环境下使用Verilog编写的HDB3编解码程序，RTL和时序仿真已过(Quartus under the environment of a HDB3 protocol procedures written in Verilog, RTL and timing simulation has be passed)
- 2015-11-24 21:56:05下载
- 积分：1
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rs_enc
Verilog code for RS-(255,239) encoder.
- 2021-04-06 16:19:02下载
- 积分：1
