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softdemodulation-of-8psk
讲述软解调很不错的一片文档，主要阐述的是8PSK的软解调FPGA实现，但对8PSK的软解调原理阐述很清楚，没有多余的东西，但需要注意其中各个调制符号点得顺序。(About soft demodulation of a document is very good, mainly on the soft 8PSK demodulation FPGA, but soft 8PSK demodulation principle describes very clearly, no extra stuff, but need to pay attention to the point where each modulation symbol was in order.)
- 2014-06-03 14:12:05下载
- 积分：1
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StopWatch
This is a simple verilog code for stopwatch undre xlinx ISE webpack based for NEXYS3 board.
- 2013-10-04 00:53:49下载
- 积分：1
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dct
里面含有vhdl和verilog 版本,很好用!dct变换用得很多啊!(Which contains a VHDL and Verilog versions of very good use! Dct transform with a lot ah!)
- 2007-08-27 16:00:31下载
- 积分：1
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vhdl抗抖动滤波器的设计，包括完整的工程
vhdl抗抖动滤波器的设计，包括完整的工程-VHDL anti-jitter filter design, including the complete works
- 2022-04-26 19:29:03下载
- 积分：1
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USB 1.1 PHY的代码，verilog语言
USB 1.1 PHY的代码，verilog语言
USB 1.1 PHY的代码，verilog语言
USB 1.1 PHY的代码，verilog语言-USB 1.1 PHY code, verilog language USB 1.1 PHY code, verilog language
- 2022-01-25 23:39:51下载
- 积分：1
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波动
用FPGA实现pwm调制波，通过单片机软核控制输入量来实现任意占空比方波的产生-wave
- 2022-02-21 19:23:40下载
- 积分：1
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UART
基于FPGA设计的串口发送及接收程序，波特率可调(FPGA - based serial port sending and receiving)
- 2020-06-18 23:20:01下载
- 积分：1
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mif
使用metlab生产正弦波和三角波的采样值，供vhdl等语言调用来产生波形(use metlab production sine wave and triangular wave of sampling, for languages such as call vhdl to generate waveforms)
- 2007-05-15 15:51:39下载
- 积分：1
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ADC实验
基于stm32开发平台的，模拟ad采样程序设计，可直接下载使用(stm32 zhijiexiazaishiyong)
- 2018-02-02 00:32:43下载
- 积分：1
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taxi
利用Verilog HDL语言设计了出租车计费器，使其具有时间 显示、计费以及模拟出租车启动、停止、复位等功能，并设置了动态扫描电路显示车费和对应时间，显示 了硬件描述语言Verilog—HDL设计数字逻辑电路的优越性。(Design using Verilog HDL language a taxi meter, it has time display, billing and simulation taxi start, stop, reset and other functions, and set dynamically display scanning circuit and the corresponding time fare, shows the hardware description language Verilog-HDL design advantages of digital logic circuits.)
- 2011-08-30 08:18:51下载
- 积分：1
