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JOP kernel source code cache, not easy to find, we must kits
JOP的内核缓存源码,不易找到,大家一定要顶啊-JOP kernel source code cache, not easy to find, we must kits
- 2022-01-27 18:39:54下载
- 积分:1
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MT9M001
FPGA驱动MT9M001的verilog代码,里面还有ddr3部分将图像数据进行存储,lcd进行图像显示,里面的摄像头驱动部分很详细,大家可以多研习研习(Verilog driver MT9M001 code, which is also the DDR3 image data storage, LCD display, which drives the part is very detailed, we can learn more)
- 2020-07-10 13:48:54下载
- 积分:1
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shumaguandongtai
VHDL的动态扫描显示六个数码管,包含分频代码产生25kHz的扫描信号作为时钟。(VHDL dynamic scanning display six digital tube contains 25kHz scanning signal is generated as a clock divider code.)
- 2012-11-26 14:40:42下载
- 积分:1
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布斯算法
展位的乘法算法 is a 乘法算法两者相乘得两个签名二进制 请点击左侧文件开始预览 !预览只提供20%的代码片段,完整代码需下载后查看 加载中 侵权举报
- 2022-10-19 10:20:03下载
- 积分:1
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MAC_TxScheduler
Ethernet MAC-MII interface of Transmit
- 2014-02-15 00:35:25下载
- 积分:1
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DDR2 控制器
下载自opencore网站!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
- 2022-08-10 04:02:14下载
- 积分:1
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doorlock
基于FPGA设计的电子密码锁是一个小型的数字系统,与普通机械锁相比,具有许多独特的优点:保密性好,防盗性强,可以不用钥匙,记住密码即可开锁等。(FPGA-based design of the electronic code lock is a small digital system. It has many unique advantages:good privacy and security , it do not need the key but remember password to unlock, and so on while it compare to ordinary mechanical locks.)
- 2013-12-25 21:24:41下载
- 积分:1
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SMBus
SMbus通讯协议的Verilog程序段,已通过Moldesim的仿真,可用(Verilog program segment of the SMbus communication protocol, has been through the Moldesim simulation, the available)
- 2021-03-24 18:29:15下载
- 积分:1
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mac_layer_switch_latest.tar
source code for Ethernet logic
- 2017-04-05 08:04:27下载
- 积分:1
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基于fpga的自动售货机
用verilog状态机实现的自动售货机,是一次课程作业,参考了网上的例子进行了修改(Automatic vending machine implemented with Verilog state machine)
- 2018-06-25 22:18:06下载
- 积分:1