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Ping_pong_Sparten3e-master
说明: FPGA实现乒乓球游戏 代码及仿真 VGA实现(FPGA realizes table tennis game code and simulation VGA implementation)
- 2019-05-06 20:22:13下载
- 积分:1
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彩条产生程序 color_bar
说明: 彩条产生程序。。。。720p需添加74.25M时钟(colorbar generation. need 74.25mhz clock if 720p gen)
- 2020-06-22 06:20:01下载
- 积分:1
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svpwm3
基於空間向量調變的開關法,在於載波做比較切出方波再送至開關讓馬達啟動(Based on the switching method of space vector modulation, the square wave is cut out for carrier comparison and sent to the switch to start the moto)
- 2019-01-04 16:07:37下载
- 积分:1
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主要是步进电机的驱动源,用Verilog VHDL开发,个人取向…
XC95144步进电机驱动器源码,采用verilog vhdl开发,个人原创-XC95144 stepper motor drive source, using verilog vhdl development, personal originality
- 2022-03-23 12:55:12下载
- 积分:1
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在MAXPLUSII下实现BOOTH算法,可以进行任意位K×K的乘法
在MAXPLUSII下实现BOOTH算法,可以进行任意位K×K的乘法-BOOTH algorthim implemented in the MAXPLUSII environment, which can carry out arbitrary bits multiplication.
- 2022-05-08 13:11:29下载
- 积分:1
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QPSK
用VHDL语言实现QPSK调制功能和解调功能,(Using VHDL language features QPSK modulation and demodulation functions,)
- 2021-04-26 15:28:46下载
- 积分:1
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用于实现两个数相加的vhdl代码,在相应的编译器中使用
用于实现两个数相加的vhdl代码,在相应的编译器中使用-used to achieve the two summed VHDL code, the corresponding use of compiler
- 2022-10-30 11:05:03下载
- 积分:1
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ConvolutionWithViterbiDecoding
QPSK调制下的(5,7)卷积码的编码和维特比译码与BPSK调制下(5,7)卷积码的编码和维特比译码的BER特性(QPSK modulation under (5,7) convolutional code encoding and Viterbi decoding and BPSK modulation (5,7) convolutional code encoding and Viterbi BER characteristic)
- 2020-12-12 20:09:15下载
- 积分:1
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UVM实战_卷Ⅰ
说明: 本书纸版由机械工业出版社于2014年出版,张强编著,电子版由华章分社(北京华章图文信息有限公司)全球范围内制作与发行(The book was published in paperback by China machine press in 2014, and edited by zhang qiang. The electronic version was produced and distributed worldwide by huazhang branch (Beijing huazhang graphic information co., LTD.))
- 2020-10-12 23:07:32下载
- 积分:1
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clk_generator
时钟分频代码,PWM产生 RTL 源代码。(clock divider,PWM generator RTL Source Code)
- 2013-08-18 09:29:42下载
- 积分:1