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《CPLDFPGA verilog DA0832调控
verilog da0832 cpldfpga control-verilog da0832 cpldfpga control
- 2022-12-07 05:55:03下载
- 积分:1
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DDS
FPGA实现DDS波形发生器,多种信号的产生,(FPGA realization of DDS waveform generator to produce a variety of signals,)
- 2014-07-20 14:31:22下载
- 积分:1
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cpld/fpga common adder Verilog design procedures
cpld/fpga常用加法器设计的verilog程序-cpld/fpga common adder Verilog design procedures
- 2022-08-19 10:20:20下载
- 积分:1
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23565785scan_led
Quartus环境下的7段扫描显示电路的源程序(Quartus environment of the seven scanning display circuit of the source)
- 2006-12-11 17:11:41下载
- 积分:1
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使用VHDL语言编程,烧录在芯片运行的倒数5秒响4声短铃最后一声长音的数字钟...
使用VHDL语言编程,烧录在芯片运行的倒数5秒响4声短铃最后一声长音的数字钟-The use of VHDL language programming, burn in the chip to run the last 5 seconds short bell ring 4 final say sound a long tone of digital clock
- 2022-06-20 16:23:08下载
- 积分:1
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ISARCSSim_dr
基于CS的一维距离像(HRRP)及FFT成像对比(CS-based HRRP and FFT HRRP)
- 2021-01-13 19:58:49下载
- 积分:1
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树式除法型开方器VERILOG实现,用于任意长度的无符号数的开方运算...
树式除法型开方器VERILOG实现,用于任意长度的无符号数的开方运算-Square root of the tree-type divider-type device to achieve VERILOG
- 2022-09-04 14:20:03下载
- 积分:1
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我用过的verilog hdl写的SDRAM core源程序,经过测试应用
我用过的verilog hdl写的SDRAM core源程序,经过测试应用-I used to write Verilog HDL source of SDRAM core, the test application
- 2022-01-23 10:44:34下载
- 积分:1
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是vhdl语言,在fpga开发板上实现十进制技术(7段数码管显示),包括复位,清零,计数使能。...
是vhdl语言,在fpga开发板上实现十进制技术(7段数码管显示),包括复位,清零,计数使能。-Is the VHDL language, in the FPGA development board realize decimal technology (7 digital tube display), including reset, cleared, counting enable.
- 2022-03-20 12:25:41下载
- 积分:1
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完成一个FIR数字滤波器的设计。要求:
1、 基于直接型和分布式两种算法。
2、 输入数据宽度为8位,输出数据宽度为16位。
3、 滤波器的阶数为1...
完成一个FIR数字滤波器的设计。要求:
1、 基于直接型和分布式两种算法。
2、 输入数据宽度为8位,输出数据宽度为16位。
3、 滤波器的阶数为16阶,抽头系数分别为h[0]=h[15]=0000,h[1]=h[14]=0065,h[2]=h[13]=018F,h[3]=h[12]=035A,h[4]=h[11]=0579,h[5]=h[10]=078E,h[6]=h[9]=0935,h[7]=h[8]=0A1F。
-Completion of a FIR digital filter design. Requirements: one, based on the direct type and distributed two algorithms. 2, input data width of 8, the output data width of 16. 3, filter order of 16 bands, tap coefficients for h [0] = h [15] = 0000, h [1] = h [14] = 0065, h [2] = h [13] = 018F , h [3] = h [12] = 035A, h [4] = h [11] = 0579, h [5] = h [10] = 078E, h [6] = h [9] = 0935, h [7] = h [8] = 0A1F.
- 2022-10-24 20:10:03下载
- 积分:1